Datasheet
LTC2158-14
8
215814f
Typical perForMance characTerisTics
LTC2158-14: Frequency Response
LTC2158-14: I
VDD
vs Sample Rate,
15MHz Sine Wave Input, –1dBFS
SAMPLE RATE (Msps)
240
I
VDD
(mA)
280
300
320
62
186
248
260
360
340
0
124
310
215814 G19
1000
100
INPUT FREQUENCY (MHz)
INPUT AMPLITUDE (dBFS)
–4.0
–1.5
–1.0
–0.5
–2.5
–4.5
–2.0
–3.0
–3.5
215814 G20
LTC2158-14: I
OVDD
vs Sample Rate,
15MHz Sine Wave Input, –1dBFS
SAMPLE RATE (Msps)
I
OVDD
(mA)
40
50
60
50
150
200 250
30
80
70
0
100
300
215814 G18
LVDS CURRENT
3.5mA
LVDS CURRENT
1.75mA
pin FuncTions
V
DD
(Pins 1, 2, 15, 16, 17, 64): 1.8V Analog Power Supply.
Bypass to ground with 0.1µF ceramic capacitors. Pins 1,
2, 64 can share a bypass capacitor. Pins 15, 16, 17 can
share a bypass capacitor.
GND (Pins 3, 6, 9, 11, 14, 18, 21, 58, Exposed Pad
Pin 65): ADC Power Ground. The exposed pad must be
soldered to the PCB ground.
A
INA
+
(Pin 4): Positive Differential Analog Input for
Channel A.
A
INA
–
(Pin 5): Negative Differential Analog Input for
Channel A.
SENSE (Pin 7): Reference Programming Pin. Connecting
SENSE to V
DD
selects the internal reference and a ±0.66V
input range. The same input voltage range can be achieved
by applying an external 1.25V reference to SENSE.
V
REF
(Pin 8): Reference Voltage Output. Bypass to ground
with a 2.2µF ceramic capacitor. Nominally 1.25V.
V
CM
(Pin 10): Common Mode Bias Output; nominally equal
to 0.435 • V
DD
. V
CM
should be used to bias the common
mode of the analog inputs. Bypass to ground with a 0.1µF
ceramic capacitor.
A
INB
–
(Pin 12): Negative Differential Analog Input for
Channel B.
A
INB
+
(Pin 13): Positive Differential Analog Input for
Channel B.
ENC
+
(Pin 19): Encode Input. Conversion starts on the
rising edge.
ENC
–
(Pin 20): Encode Complement Input. Conversion
starts on the falling edge.
OGND (Pins 33, 48): Output Driver
Ground.
OV
DD
(Pins 32, 49): 1.8V Output Driver Supply. Bypass
each pin to ground with separate 0.1µF ceramic capacitors.
SDO (Pin 59): Serial Interface Data Output. In serial pro-
gramming mode, (PAR/SER = 0V), SDO is the optional serial
interface data output. Data on SDO is read back from the
mode control registers and can be latched on the falling
edge of SCK. SDO is an open-drain N-channel MOSFET
output that requires an external 2k pull-up resistor from
1.8V to 3.3V. If readback from the mode control registers
is not needed, the pull-up resistor is not necessary and
SDO can be left unconnected.