LTC2157-12/ LTC2156-12/LTC2155-12 Dual 12-Bit 250Msps/ 210Msps/170Msps ADCs FEATURES n n n n n n n n n n n n DESCRIPTION The LTC®2157-12/LTC2156-12/LTC2155-12 are a family of dual 250Msps/210Msps/170Msps 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 68.5dB SNR and 90dB spurious free dynamic range (SFDR). The 1.
LTC2157-12/ LTC2156-12/LTC2155-12 TOP VIEW VDD 1 VDD 2 GND 3 AINA+ 4 AINA– 5 GND 6 SENSE 7 VREF 8 GND 9 VCM 10 GND 11 AINB– 12 AINB+ 13 GND 14 VDD 15 VDD 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 65 GND OGND DA2_3+ DA2_3– DA0_1+ DA0_1– NC NC CLKOUT+ CLKOUT– DB10_11+ DB10_11– DB8_9+ DB8_9– DB6_7+ DB6_7– OGND VDD GND ENC+ ENC– GND OF – OF + NC NC DB0_1– DB0_1+ DB2_3– DB2_3+ DB4_5 – DB4_5+ OVDD 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Supply Voltage VDD, OVDD............................
LTC2157-12/ LTC2156-12/LTC2155-12 CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) PARAMETER CONDITIONS MIN Resolution (No Missing Codes) l LTC2157-12 TYP MAX MIN 12 LTC2156-12 TYP MAX LTC2155-12 MIN TYP MAX 12 UNITS 12 Bits Integral Linearity Error Differential Analog Input (Note 6) l –2.3 ±0.26 2.3 –2.2 ±0.30 2.2 –1.9 ±0.30 1.
LTC2157-12/ LTC2156-12/LTC2155-12 INTERNAL REFERENCE CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) PARAMETER CONDITIONS VCM Output Voltage IOUT = 0 MIN TYP MAX 0.435 • VDD – 18mV 0.435 • VDD 0.435 • VDD + 18mV VCM Output Temperature Drift UNITS ±37 VCM Output Resistance –1mA < IOUT < 1mA VREF Output Voltage IOUT = 0 ppm/°C 4 1.225 Ω 1.250 VREF Output Temperature Drift 1.
LTC2157-12/ LTC2156-12/LTC2155-12 DIGITAL INPUTS AND OUTPUTS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER DIGITAL DATA OUTPUTS CONDITIONS VOD Differential Output Voltage VOS Common Mode Output Voltage RTERM On-Chip Termination Resistance 100Ω Differential Load, 3.5mA Mode 100Ω Differential Load, 1.75mA Mode 100Ω Differential Load, 3.5mA Mode 100Ω Differential Load, 1.
LTC2157-12/ LTC2156-12/LTC2155-12 TIMING DIAGRAMS Double-Data Rate Output Timing, All Outputs Are Differential LVDS N tAP N+3 N+2 N+1 tL tH ENC– ENC+ CLKOUT+ CLKOUT – DA0_1– DA0_1+ DA10_11– DA10_11+ DB0_1– DB0_1+ tC DA0N-5 DA1N-5 DA0N-4 DA1N-4 DA0N-3 DA1N-3 tD DA10N-5 DA11N-5 DA10N-4 DA11N-4 DA10N-3 DA11N-3 DB0N-5 DB1N-5 DB0N-4 DB1N-4 DB0N-3 DB1N-3 DB10_11– DB10_11+ DB10N-5 DB11N-5 DB10N-4 DB11N-4 DB10N-3 DB11N-3 OF– OF+ OF_A N-5 OF_B N-5 OF_A N-4 OF_B N-4 OF_A N-3 OF_B N-3 tSKEW 215
LTC2157-12/ LTC2156-12/LTC2155-12 TIMING DIAGRAMS SPI Port Timing (Readback Mode) tDS tS tDH tSCK tH CS SCK tDO SDI SDO R/W A6 A5 A4 A3 A2 A1 A0 XX D7 HIGH IMPEDANCE XX D6 XX D5 XX D4 XX D3 XX D2 XX XX D1 D0 SPI Port Timing (Write Mode) CS SCK SDI SDO R/W HIGH IMPEDANCE A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 21576512 TD02 21576512f 7
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2157-12: Integral Nonlinearity (INL) LTC2157-12: Differential Nonlinearity (DNL) LTC2157-12: 32K Point FFT, fIN = 15MHz, –1dBFS, 250Msps 0.50 2.0 0 1.5 –20 DNL ERROR (LSB) INL ERROR (LSB) 0.5 0 –0.5 AMPLITUDE (dBFS) 0.25 1.0 0 0 4095 –0.
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL PERFORMANCE CHARACTERISTICS 0 –40 –60 –80 –100 –120 0 –20 AMPLITUDE (dBFS) AMPLITUDE (dBFS) –20 LTC2157-12: 32K Point 2-Tone FFT, fIN = 71.0MHz and 69.
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2157-12: SNR vs Input Frequency, –1dBFS, 1.5V Range, 250Msps 75 INPUT AMPLITUDE (dBFS) 70 60 55 50 2.0 –1.0 1.5 –1.5 1.0 –2.0 –2.5 –3.0 –3.5 0.5 0 –0.5 –1.0 –4.0 45 40 –0.5 INL ERROR (LSB) SNR (dBFS) 65 LTC2156-12: Integral Nonlinearity (INL) LTC2157-12: Frequency Response –1.5 –4.5 0 100 200 300 400 500 600 700 800 900 1000 INPUT FREQUENCY (MHz) –5.0 –2.
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL PERFORMANCE CHARACTERISTICS 0 0 –20 –20 –20 –40 –60 –80 –120 AMPLITUDE (dBFS) 0 –100 –40 –60 –80 –100 0 20 40 60 80 FREQUENCY (MHz) 100 –120 0 20 40 60 80 FREQUENCY (MHz) –60 –80 –120 100 LTC2156-12: 32K Point FFT, fIN = 907MHz, –1dBFS, 210Msps AMPLITUDE (dBFS) –80 40 60 80 FREQUENCY (MHz) 20000 18000 16000 14000 –40 –60 –80 –100 –100 –120 –120 100 LTC2156-12: Shorted Input Histogram –20 –20 –60 20 21576512 G30 0 –40 0 2157
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2156-12: SFDR vs Input Frequency, –1dBFS, 1.5V Range, 210Msps LTC2156-12: SNR vs Input Level, fIN = 70MHz, 1.5V Range, 210 Msps dBFS 60 70 80 70 dBc 40 30 65 60 SNR (dBFS) SFDR (dBFS) 50 SNR (dBFS) 75 90 70 50 40 30 20 60 55 50 20 10 45 10 0 –60 –50 –40 –30 –20 AMPLITUDE (dBFS) –10 0 0 –1.0 1.5 –1.5 1.0 INL ERROR (LSB) –3.5 LTC2155-12: Differential Nonlinearity (DNL) 0.50 0.25 DNL ERROR (LSB) 2.
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL PERFORMANCE CHARACTERISTICS AMPLITUDE (dBFS) AMPLITUDE (dBFS) –20 –40 –60 –80 –100 –120 0 0 –20 –20 AMPLITUDE (dBFS) 0 LTC2155-12: 32K Point FFT, fIN = 225MHz, –1dBFS, 170Msps LTC2155-12: 32K Point FFT, fIN = 176MHz, –1dBFS, 170Msps –40 –60 –80 –100 0 10 20 30 40 50 60 FREQUENCY (MHz) 70 –120 80 0 0 10 20 30 40 50 60 FREQUENCY (MHz) –100 10 20 30 40 50 60 FREQUENCY (MHz) 70 –60 –80 –120 80 0 10 20 30 40 50 60 FREQUENCY (MHz) 70
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2155-12: IVDD vs Sample Rate, 15MHz Sine Wave Input, –1dBFS LTC2155-12: SFDR vs Input Level, fIN = 70MHz, 1.5V Range, 170Msps LTC2155-12: SNR vs Input Level, fIN = 70MHz, 1.5V Range, 170Msps 260 100 220 210 0 34 102 136 68 SAMPLE RATE (Msps) 80 dBc 60 21576512 G55 10 0 SNR (dBFS) 60 55 50 45 0 100 200 300 400 500 600 700 800 900 1000 INPUT FREQUENCY (MHz) 21576512 G38 0 –1.5 –2.0 –2.5 –3.0 –3.5 –4.0 20 40 –10 –1.
LTC2157-12/ LTC2156-12/LTC2155-12 PIN FUNCTIONS VDD (Pins 1, 2, 15, 16, 17, 64): 1.8V Analog Power Supply. Bypass to ground with 0.1µF ceramic capacitors. Pins 1, 2, 64 can share a bypass capacitor. Pins 15, 16, 17 can share a bypass capacitor. GND (Pins 3, 6, 9, 11, 14, 18, 21, 58, Exposed Pad Pin 65): ADC Power Ground. The exposed pad must be soldered to the PCB ground. AINA+ (Pin 4): Positive Differential Analog Input for Channel A. AINA– (Pin 5): Negative Differential Analog Input for Channel A.
LTC2157-12/ LTC2156-12/LTC2155-12 PIN FUNCTIONS CLKOUT –/CLKOUT+ (Pins 40/41): Data Output Clock. The digital outputs normally transition at the same time as the falling and rising edges of CLKOUT+. The phase of CLKOUT+ can also be delayed relative to the digital outputs by programming the mode control registers. LVDS Outputs The following pins are differential LVDS outputs. The output current level is programmable.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION CONVERTER OPERATION INPUT DRIVE CIRCUITS The LTC2157-12/LTC2156-12/LTC2155-12 are twochannel, 12-bit 250Msps/210Msps/170Msps A/D converters that are powered by a single 1.8V supply. The analog inputs must be driven differentially. The encode inputs should be driven differentially for optimal performance. The digital outputs are double-data rate LVDS.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION VCM 10Ω 0.1µF 50Ω LTC2157-12 0.1µF 4.7Ω IN LTC2157-12 AIN+ 3pF 0.1µF 45Ω 4.7Ω INPUT 0.1µF 100Ω 0.1µF 45Ω 0.1µF 4.7Ω T1: MABA 007159-000000 VCM 0.1µF 50Ω 4.7Ω 3pF AIN+ AIN– 3pF AIN– 21576512 F06 21576514 F05 Figure 6. Front-End Circuit Using a High Speed Differential Amplifier Figure 5.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION LTC2157-12 VDD 1.2V 0.1µF 10k 50Ω T1 100Ω 0.1µF 50Ω 21576512 F09 T1: MACOM ETC1-1-13 Figure 9. Sinusoidal Encode Drive LTC2157-12 VDD 1.2V 0.1µF PECL OR LVDS INPUT ENC+ 10k 100Ω 0.1µF ENC– 21576512 F10 Figure 10. PECL or LVDS Encode Drive Clock Duty Cycle Stabilizer DIGITAL OUTPUTS For good performance the encode signal should have a 50% (±5%) duty cycle.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION By default the outputs are standard LVDS levels: 3.5mA output current and a 1.25V output common mode voltage. An external 100Ω differential termination resistor is required for each LVDS output pair. The termination resistors should be located as close as possible to the LVDS receiver. The outputs are powered by OVDD and OGND which are isolated from the A/D core power and ground.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION DATA FORMAT CLKOUT Table 1 shows the relationship between the analog input voltage, the digital data output bits and the overflow bit. By default the output data format is offset binary. The 2’s complement format can be selected by serially programming mode control register A4. OF OF D11 Table 1. Output Codes vs Input Voltage AIN+ – AIN– CLKOUT D11/D0 D10 (1.5V Range) OF D11-D0 (OFFSET BINARY) D11-D0 (2’s COMPLEMENT) >0.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION Alternate Bit Polarity Sleep Mode Another feature that may reduce digital feedback on the circuit board is the alternate bit polarity mode. When this mode is enabled, all of the odd bits (D1, D3, D5, D7, D9, D11) are inverted before the output buffers. The even bits (D0, D2, D4, D6, D8, D10), OF and CLKOUT are not affected.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION Table 2. Parallel Programming Mode Control Bits (PAR/SER = VDD) PIN DESCRIPTION CS Clock Duty Cycle Stabilizer Control Bit 0 = Clock Duty Cycle Stabilizer Off 1 = Clock Duty Cycle Stabilizer On SCK Power Down Control Bit 0 = Normal Operation 1 = Sleep Mode (entire ADC is powered down) SDI LVDS Current Selection Bit 0 = 3.5mA LVDS Current Mode 1 = 1.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION Table 3. Serial Programming Mode Register Map (PAR/SER = GND). An “X” Indicates Unused Bit REGISTER A0: RESET REGISTER (ADDRESS 00h) WRITE-ONLY D7 D6 D5 D4 D3 D2 D1 D0 RESET X X X X X X X RESET Bit 7 Software Reset Bit 0 = Reset Disabled 1 = Software Reset. All mode control registers are reset to 00h. This bit is automatically set back to zero after the reset is complete.
LTC2157-12/ LTC2156-12/LTC2155-12 APPLICATIONS INFORMATION REGISTER A3: OUTPUT MODE REGISTER (ADDRESS 03h) D7 X D6 D5 D4 D3 D2 D1 D0 X X ILVDS2 ILVDS1 ILVDS0 TERMON OUTOFF Bits 7-5 Unused, these bits are read back as 0 Bits 4-2 ILVDS2:ILVDS0 LVDS Output Current Bits 000 = 3.5mA LVDS Output Driver Current 001 = 4.0mA LVDS Output Driver Current 010 = 4.5mA LVDS Output Driver Current 011 = Not Used 100 = 3.0mA LVDS Output Driver Current 101 = 2.5mA LVDS Output Driver Current 110 = 2.
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL APPLICATIONS Silkscreen Top Top Side 21576512f 26
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL APPLICATIONS Inner Layer 2 GND Inner Layer 3 21576512f 27
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL APPLICATIONS Inner Layer 4 Inner Layer 5 21576512f 28
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL APPLICATIONS Bottom Side 21576512f 29
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL APPLICATIONS LTC2157-12 Schematic VDD C7 0.1µF C5 0.1µF C12 0.1µF PAR/SER VDD AINA AINA– 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 65 R34 10Ω C27 1pF R33 10Ω R8 100Ω C4 2.2µF C29 0.
LTC2157-12/ LTC2156-12/LTC2155-12 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UP Package 64-Lead Plastic QFN (9mm × 9mm) (Reference LTC DWG # 05-08-1705 Rev C) 0.70 ±0.05 7.15 ±0.05 7.50 REF 8.10 ±0.05 9.50 ±0.05 (4 SIDES) 7.15 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 9 .00 ±0.10 (4 SIDES) 0.75 ±0.05 R = 0.10 TYP R = 0.
LTC2157-12/ LTC2156-12/LTC2155-12 TYPICAL APPLICATION LTC2157-12: 32K Points 2-Tone FFT, fIN = 71MHz and 69MHz, 250Msps VDD OVDD ANALOG INPUT CLOCK ANALOG INPUT S/H 12-BIT PIPELINED ADC CORE OUTPUT DRIVERS DA10_11 • • • DA0_1 0 DDR LVDS OGND CLOCK/DUTY CYCLE CONTROL S/H CORRECTION LOGIC OVDD CHANNEL B 12-BIT PIPELINED ADC CORE CORRECTION LOGIC OUTPUT DRIVERS DB10_11 • • • DB0_1 –20 AMPLITUDE (dBFS) CHANNEL A –40 –60 –80 –100 DDR LVDS –120 0 20 GND 40 60 80 100 FREQUENCY (MHz) 12
