Datasheet

8
LTC1966
sn1966 1966fas
GND (Pin 1): Ground. A power return pin.
IN1 (Pin 2): Differential Input. DC coupled (polarity is
irrelevant).
IN2 (Pin 3): Differential Input. DC coupled (polarity is
irrelevant).
V
SS
(Pin 4): Negative Voltage Supply. GND to –5.5V.
V
OUT
(Pin 5): Output Voltage. This is high impedance. The
RMS averaging is accomplished with a single shunt ca-
pacitor from this node to OUT RTN. The transfer function
is given by:
V OUT RTN Average IN IN
OUT
––
()
=
()






21
2
UU
U
PI FU CTIO S
OUT RTN (Pin 6): Output Return. The output voltage is
created relative to this pin. The V
OUT
and OUT RTN pins are
not balanced and this pin should be tied to a low imped-
ance, both AC and DC. Although it is typically tied to GND,
it can be tied to any arbitrary voltage, V
SS
< OUT RTN <
(V
DD
– Max Output). Best results are obtained when
OUT RTN = GND.
V
DD
(Pin 7): Positive Voltage Supply. 2.7V to 5.5V.
ENABLE (Pin 8): An Active-Low Enable Input. LTC1966 is
debiased if open circuited or driven to V
DD
. For normal
operation, pull to GND, a logic low or even V
SS
.