Datasheet

11
LTC1966
sn1966 1966fas
APPLICATIO S I FOR ATIO
WUUU
How an RMS-to-DC Converter Works
Monolithic RMS-to-DC converters use an implicit com-
putation to calculate the RMS value of an input signal. The
fundamental building block is an analog multiply/divide
used as shown in Figure 3. Analysis of this topology is
easy and starts by identifying the inputs and the output of
the lowpass filter. The input to the LPF is the calculation
from the multiplier/divider; (V
IN
)
2
/V
OUT
. The lowpass
filter will take the average of this to create the output,
mathematically:
How the LTC1966 RMS-to-DC Converter Works
The LTC1966 uses a completely new topology for RMS-to-
DC conversion, in which a ∆Σ modulator acts as the
divider, and a simple polarity switch is used as the multi-
plier
1
as shown in Figure 4.
1
Multiple patents pending
V
V
V
V
V
V
so
V
V
V
and
VVor
V V RMS V
OUT
IN
OUT
OUT
IN
OUT
OUT
IN
OUT
OUT IN
OUT IN IN
=
()








()








=
()




=
()




()
=
()
=
()
=
()
2
2
2
2
22
2
,
,
,
,
Because V is DC,
V
OUT
IN
Figure 3. RMS-to-DC Converter with Implicit Computation
V
IN
V
OUT
1966 F03
÷×
LPF
V
V
IN
OUT
()
2
Unlike the prior generation RMS-to-DC converters, the
LTC1966 computation does NOT use log/antilog circuits,
which have all the same problems, and more, of log/
antilog multipliers/dividers, i.e., linearity is poor, the band-
width changes with the signal amplitude and the gain drifts
with temperature.
Figure 4. Topology of LTC1966
∆-Σ
REF
V
IN
V
OUT
LPF
±1
D
V
V
IN
OUT
α
The ∆Σ modulator has a single-bit output whose average
duty cycle (D) will be proportional to the ratio of the input
signal divided by the output. The ∆Σ is a 2nd order
modulator with excellent linearity. The single-bit output is
used to selectively buffer or invert the input signal. Again,
this is a circuit with excellent linearity, because it operates
at only two points: ±1 gain; the average effective multipli-
cation over time will be on the straight line between these
two points. The combination of these two elements again
creates a lowpass filter input signal equal to (V
IN
)
2
/V
OUT
,
which, as shown above, results in RMS-to-DC conversion.
The lowpass filter performs the averaging of the RMS
function and must be a lower corner frequency than the
lowest frequency of interest. For line frequency measure-
ments, this filter is simply too large to implement on-chip,
but the LTC1966 needs only one capacitor on the output to
implement the lowpass filter. The user can select this
capacitor depending on frequency range and settling time
requirements, as will be covered in the Design Cookbook
section to follow.
This topology is inherently more stable and linear than log/
antilog implementations primarily because all of the signal
processing occurs in circuits with high gain op amps
operating closed loop.