Datasheet
LTC1922-1
16
If RAMP and CS are connected together:
R
VAR
I PEAK
CS
SLOPE
P
=
µ0 4 125.–( • )
()
I PEAK
I
N EFF
VD
Lf
VD
LfN
P
O MAX IN MAX MIN
MAG CLK
OMIN
OUT CLK
()
••
••
•
(– )
••
() ()
=+ +
2
2
1
where: N = Transformer turns ratio
If RAMP and CS are separated
R
V
I PEAK
CS
P
=
04.
()
Current Transformer Sensing
A current sense transformer can be used in lieu of resistive
sensing with the LTC1922-1. Current sense transformers
are available in many styles from several manufacturers.
A typical sense transformer for this application will use a
1:50 turns ratio (N), so that the sense resistor value is N
times larger, and the secondary current N times smaller
than in the resistive sense case. Therefore, the sense
resistor power loss is about N times less with the trans-
former method, neglecting the transformers core and
copper losses. The disadvantages of this approach
include, higher cost and complexity, lower accuracy, core
reset/max duty cycle limitations and lower speed. Never-
theless, for very high power applications, this method is
preferred. The sense transformer primary is placed in the
same location as the ground referenced sense resistor, or
between the upper MOSFET drains in the (MA, MC) and
V
IN
. The advantage of the high side location is a greater
immunity to leading edge noise spikes, since gate charge
current and reflected rectifier recovery current are largely
eliminated. Figure 10 illustrates a typical current sense
transformer based sensing scheme. R
S
in this case is
calculated the same as in the resistive case, only its value
is increased by the sense transformer turns ratio. At high
duty cycles, it may become difficult or impossible to reset
the current transformer. This is because the required
transformer reset voltage increases as the available time
for reset decreases to equalize the (volt • seconds) applied.
The interwinding capacitance and secondary inductance
of the current sense transformer form a resonant circuit
that limits the dV/dT on the secondary of the CS trans-
former. This in turn limits the maximum achievable duty
cycle for the CS transformer. Attempts to operate beyond
this limit will cause the transformer core to “walk” and
eventually saturate, opening up the current feedback loop.
Common methods to address this limitation include:
1. Reducing the maximum duty cycle by lowering the
power transformer turns ratio.
2. Reducing the switching frequency of the converter.
3. Employ external active reset circuitry.
4. Using two CS transformers summed together.
5. Choose a CS transformer optimized for high frequency
applications.
OUTPUT CURRENT (A)
0
POWER LOSS (W)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10 20 25
1922 • F09
515 303540
R
S
= 0.025
V
IN
= 48V
V
O
= 3.3V
L
O
= 2.2µH
Figure 9. R
SENSE
Power Loss vs I
OUT
OPTIONAL
FILTERING
N:1
MB
SOURCE
MD
SOURCE
CURRENT
TRANSFORMER
R
SLOPE
RAMP
CS
R
S
1922 F10
Figure 10. Current Transformer Sense Circuitry
OPERATIO
U