Datasheet

LTC1922-1
15
The pulse-by-pulse comparator has a 400mV nominal
threshold, which can reduce sense resistor losses by 67%
compared to previous solutions. This corresponds to 3W
in a 200W, 48V to 3.3V converter. If the 400mV threshold
is exceeded, the PWM cycle is terminated. The overcurrent
comparator is set approximately 50% higher than the
pulse-by-pulse level. If the current signal exceeds this
level, the PWM cycle is terminated, the soft-start capacitor
is quickly discharged and a soft-start cycle is initiated. If
the overcurrent condition persists, the LTC1922-1 halts
PWM operation and waits for the soft-start capacitor to
charge up to approximately 4V before a retry is allowed.
The soft-start capacitor is charged by an internal 12µA
current source. If the fault condition has not cleared when
soft-start reaches 4V, the soft-start pin is again dis-
charged and a new cycle is initiated. This is referred to as
hiccup mode operation. In normal operation and under
most abnormal conditions, the pulse-by-pulse compara-
tor is fast enough to prevent hiccup mode operation. In
severe cases, however, with high input voltage, very low
RDS
(ON)
MOSFETs and a shorted output, or with saturat-
ing magnetics, the overcurrent comparator provides a
means of protecting the power converter.
Leading Edge Blanking
The LTC1922-1 provides programmable leading edge
blanking to prevent nuisance tripping of the current sense
circuitry. Although the ZVS full-bridge topology is some-
what more immune to leading edge noise spikes than
other types of converters, they are not totally eliminated.
Leading edge blanking relieves the filtering requirements
for the CS pin, greatly improving the response to real
overcurrent conditions. It also allows the use of a ground
referenced current sense resistor or transformer(s), fur-
ther simplifying the design. With a single 10k to 100k
resistor from R
LEB
to GND, blanking times of approxi-
mately 40ns to 320ns are programmed. If not required,
connecting R
LEB
to V
REF
can disable leading edge blank-
ing. Keep in mind that the use of leading edge blanking will
set a minimum linear control range for the phase modula-
tion circuitry.
Resistive Sensing
A resistor connected between input common and the
sources of MB and MD is the simplest, fastest and most
accurate method of current sensing for the full-bridge
converter. This is the preferred method for low to moder-
ate power levels. A graph of resistive sense power losses
vs output power is shown Figure 9. The sense resistor
should be chosen such that the maximum rated output
current for the converter can be delivered at the lowest
expected V
IN
. Use the following formula to calculate the
optimal value for R
CS
.
+
+
OVERLOAD
CURRENT LIMIT
400mV
600mV
φ
MOD
UVLO
ENABLE
UVLO
ENABLE
R
SQ
R
SQ
Q
Q
S
Q
PWM
LOGIC
H = SHUTDOWN
OUTPUTS
CS
R
CS
+
+
C
SS
SS
0.4V
4.1V
12µA
1922 F08
PULSE BY PULSE
CURRENT LIMIT
PWM
LATCH
Figure 8. Current Sense/Fault Circuitry Detail
OPERATIO
U