Datasheet

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LTC1879

1879f

1.2A Synchronous

Step-Down Regulator with

15µA Quiescent Current

■

Cellular Telephones

■

Portable Computers

■

Wireless Modems

, LTC and LT are registered trademarks of Linear Technology Corporation.

High Efficiency Step-Down Converter

■

High Efficiency: Up to 95%

■

Low Quiescent Current: Only 15µA with No Load

■

550kHz Constant Frequency Operation

■

2.65V to 10V Input Voltage Range

■

OUT

from 0.8V to V

, I

OUT

to 1.2A

■

True PLL Frequency Locking from 350kHz to 750kHz

■

Power Good Output Voltage Monitor

■

Low Dropout Operation: 100% Duty Cycle

■

Burst Mode

or Pulse Skipping Operation

■

Current Mode Operation for Excellent Line and Load

Transient Response

■

Shutdown Mode Draws <1µA Supply Current

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±2% Output Voltage Accuracy

■

Overcurrent and Overtemperature Protected

■

Available in 16-Lead SSOP Package

The LTC

1879 is a high efficiency monolithic synchro-

nous buck regulator using a constant frequency, current

mode architecture. Operating supply current is only 15µA

with no load and drops to <1µA in shutdown. The input

supply voltage range of 2.65V to 10V makes the LTC1879

ideally suited for both single and dual Li-Ion battery-pow-

ered applications. 100% duty cycle provides low dropout

operation, extending battery life in portable systems.

The switching frequency is internally set to 550kHz, allow-

ing the use of small surface mount inductors and capaci-

tors. For noise sensitive applications, the LTC1879 can be

externally synchronized from 350kHz to 750kHz. Burst

Mode operation is inhibited during synchronization or

when the SYNC/MODE pin is pulled low.

The internal synchronous rectifier switch increases effi-

ciency and eliminates the need for an external Schottky

diode. Low output voltages are easily supported with a

0.8V feedback reference voltage. The LTC1879 is available

in a 16-lead SSOP package.

Burst Mode is a registered trademark of Linear Technology Corporation.

Efficiency vs Output Load Current

RUN/SS

SYNC/MODE

PGOOD

SWP

SWN

PGND

8, 9

5, 12

6, 11

7, 10

LTC1879

28.0k

: TAIYO YUDEN CERAMIC LMK325BJ106MN

OUT

: TDK CERAMIC C4532X5ROJ476M

L1: TOKO A921CY6R2M

OUT

CONNECTED TO V

(MINUS SWITCH AND L1 VOLTAGE DROP) FOR 2.65V < V

< 3.1V

1879 TA01a

220pF

150k

80.6k

OUT

47µF

OUT

3.1V

6.2µH

SGND

47pF

10µF

2.65V TO 10V

OUPUT CURRENT (mA)

EFFICIENCY (%)

100

0.1 10 100

1879 TA01b

1 1000

Burst Mode OPERATION

OUT

= 3.1V

L = 6.2µH

= 7.2V

= 10V

= 3.6V

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

Summary of content (20 pages)

PAGE 1
LTC1879 1.2A Synchronous Step-Down Regulator with 15µA Quiescent Current U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO High Efficiency: Up to 95% Low Quiescent Current: Only 15µA with No Load 550kHz Constant Frequency Operation 2.65V to 10V Input Voltage Range VOUT from 0.8V to VIN, IOUT to 1.
PAGE 2
LTC1879 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) Input Supply Voltage ................................ – 0.3V to 11V ITH, PLL_LPF Voltages ............................. – 0.3V to 2.7V RUN/SS, VFB Voltages ............................... – 0.3V to VIN SYNC/MODE Voltage ................................. – 0.3V to VIN (VPVIN – VSWP) Voltage ............................. – 0.3V to 11V VSWN Voltage ............................................ – 0.
PAGE 3
LTC1879 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN VRUN RUN Threshold VRUN Ramping Up IRUN RUN Input Current VRUN = 0V 0.2 ● Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1879E is guaranteed to meet specified performance from 0°C to 70°C.
PAGE 4
LTC1879 U W TYPICAL PERFOR A CE CHARACTERISTICS Switch Leakage vs Temperature Switch Leakage vs Input Voltage 20 VIN = 10V 16 2.50 2.49 40 SWITCH LEAKAGE (nA) SWITCH LEAKAGE (µA) RUN = 0V TA = 25°C 45 14 12 MAIN SWITCH 10 8 6 SYNCHRONOUS SWITCH 4 2 0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 OUTPUT VOLTAGE (V) 18 35 30 25 MAIN SWITCH 20 15 0 SYNCHRONOUS SWITCH 2 0 6 4 INPUT VOLTAGE (V) 8 2.41 0 90 Efficiency vs Output Current 100 799 798 797 80 VIN = 5V 70 VIN = 7.
PAGE 5
LTC1879 U W TYPICAL PERFOR A CE CHARACTERISTICS Load Step (Pulse Skipping Mode) Load Step (Burst Mode Operation) IL 1A/DIV Soft-Start with Shorted Output IL 1A/DIV IVIN 500mA/DIV RUN/SS 1V/DIV VOUT 100mV/DIV VOUT 100mV/DIV VIN = 5V VOUT = 2.5V L = 4.7µH 50µs/DIV CIN = 20µF COUT = 47µF ILOAD = 50mA to 1200mA 1879 G15 VIN = 5V VOUT = 2.5V L = 4.7µH 50µs/DIV CIN = 20µF COUT = 47µF ILOAD = 50mA to 1200mA 1879 G16 Burst Mode Operation VIN = 5V VOUT = 0V L = 4.
PAGE 6
LTC1879 U U U PI FU CTIO S SGND (Pin 1): Signal Ground Pin. RUN/SS (Pin 2): Combination of Soft-Start and Run Control Inputs. Forcing this pin below 0.7V shuts down the device. In shutdown all functions are disabled and device draws zero supply current. For the proper operation of the part, force this pin above 2.5V. Do not leave this pin floating. Soft-start can be accomplished by raising the voltage on this pin gradually with an RC circuit. VFB (Pin 3): Feedback Pin.
PAGE 7
2 3 15 RUN/SS VFB 0.6V SYNC/MODE PLL_LPF + 16 SOFT-START 0.8V REF SVIN 0.74V 0.86V 0.8V FREQ SHIFT VCO AND OSC + – – + – + EA SLOPE COMP UVDET OVDET SVIN SLEEP OSC + Y = “0” ONLY WHEN X IS A CONSTANT “1” OV 4 ITH 0.45V Q R 1 SGND 14 PGOOD SWITCHING LOGIC AND BLANKING CIRCUIT SLEEP SHUTDOWN BURST EN THERMAL SHUTDOWN RS LATCH Q S + – – – BURST DEFEAT Y X 0.8V ICOMP – + + RCMP ANTISHOOTTHROUGH – BOTTOM MOSFET 2.
PAGE 8
LTC1879 U OPERATIO (Refer to Block Diagram) Main Control Loop The LTC1879 uses a constant frequency, current mode step-down architecture. Both the top MOSFET and synchronous bottom MOSFET switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch.
PAGE 9
LTC1879 U OPERATIO (Refer to Block Diagram) Power Good Indicator Low Dropout Operation The power good function monitors the output voltage in all modes of operation. Its open-drain output is pulled low when the output voltage is not within ±7.5% of its nominally regulated voltage. The feedback voltage is filtered before it is fed to a power good window comparator in order to prevent false tripping of the power good signal during fast transients.
PAGE 10
LTC1879 Slope Compensation and Inductor Peak Current Slope compensation is required in order to prevent subharmonic oscillation at high duty cycles. It is accomplished by internally adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. As a result, the maximum inductor peak current is reduced for duty cycles > 40%. This is shown in the decrease of the inductor peak current as a function of duty cycle graph in Figure 3.
PAGE 11
LTC1879 U W U U APPLICATIO S I FOR ATIO CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a trapezoidal waveform of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS input capacitor current is given by: IRMS(CIN) ≅ IOMAX [VOUT(VIN – VOUT )]1/2 VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2.
PAGE 12
LTC1879 U W U U APPLICATIO S I FOR ATIO 0.8V ≤ VOUT ≤ 10V RLP 2.4V R1 VFB LTC1879 CLP PLL_LPF R2 SYNC/ MODE SGND 1879 F04 DIGITAL PHASE/ FREQUENCY DETECTOR VCO Figure 4. Setting the LTC1879 Output Voltage Phase-Locked Loop and Frequency Synchronization The LTC1879 has an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop. This allows the MOSFET turn-on to be locked to the rising edge of an external frequency source.
PAGE 13
LTC1879 U W U U APPLICATIO S I FOR ATIO Where ρ1, ρ2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC1879 circuits: supply quiescent currents and I2R losses. The supply quiescent current loss dominates the efficiency loss at very low load current whereas the I2R loss dominates the efficiency loss at medium to high load currents.
PAGE 14
LTC1879 U W U U APPLICATIO S I FOR ATIO where TA is the ambient temperature. Because the power transistor RDS(ON) is a function of temperature, it is usually necessary to iterate 2 to 3 times through the equations to achieve a reasonably accurate value for the junction temperature. As an example, consider the LTC1879 in dropout at an input voltage of 5V, a load current of 0.8A and an ambient temperature of 70°C.
PAGE 15
LTC1879 U W U U APPLICATIO S I FOR ATIO PC Board Layout Checklist 3. The high di/dt loop from the top terminal of the input capacitor, through the power MOSFETs and back to the input capacitor should be kept as tight as possible to reduce inductive ringing. Excess inductance can cause increased stress on the power MOSFET and increase noise on the input.
PAGE 16
LTC1879 U W U U APPLICATIO S I FOR ATIO Design Example As a design example, assume the LTC1879 is used in a dual lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 8.4V down to about 2.65V. The load current requirement is a maximum of 0.7A but most of the time it will be on standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V.
PAGE 17
LTC1879 U W U U APPLICATIO S I FOR ATIO RSVIN 10Ω CSVIN 0.1µF 13 RPG 100k 15 SYNC/MODE SVIN 14 PGOOD PVIN RSS 1M PVIN 2 PGND RUN/SS PGND CSS 0.1µF LTC1879 16 SWP SWP PLL_LPF SWN SWN 4 CC2 220pF VFB ITH CC1 47pF SGND RC 150k 8 9 7 VIN 2.65V TO 8.4V CIN2 10µF CIN1 10µF GND 10 5 12 L1 15µH COUT 47µF VOUT 2.5V 0.
PAGE 18
LTC1879 U TYPICAL APPLICATIO Dual Li-Ion to 1.8V/1A Regulator Using All Ceramic Capacitors RSVIN 10Ω CSVIN 0.1µF 13 RPG 100k SVIN 14 15 SYNC/MODE PGOOD PVIN RSS 1M PVIN 2 PGND RUN/SS PGND CSS 0.1µF LTC1879 16 SWP SWP PLL_LPF SWN SWN 4 CC2 220pF VFB ITH CC1 47pF SGND 8 9 CIN1 10µF 7 VIN 3V TO 8.4V CIN2 10µF GND 10 COUT 47µF 5 12 L1 8.2µH VOUT 1.
PAGE 19
LTC1879 U PACKAGE DESCRIPTION GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 TYP RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .053 – .068 (1.351 – 1.727) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.
PAGE 20
LTC1879 U TYPICAL APPLICATIO 5-Cell NiMH to 3.3V/0.25A ZETA Regulator Using All Ceramic Capacitors RSVIN 10Ω CSVIN 0.1µF 13 RPG 100k SVIN 14 15 SYNC/MODE PGOOD PVIN RSS 1M PVIN 2 PGND RUN/SS PGND CSS 0.1µF 9 7 16 PLL_LPF SWP SWP SWN 4 ITH CC1 47pF COUT 47µF • 5 12 6 11 3 VFB SGND GND 10 CC 10µF L1 4.7µH • SWN VIN 2.8V TO 7.5V CIN2 10µF CIN1 10µF L1 LTC1879 CC2 220pF 8 R1 1.3M VOUT 3.3V 0.