Datasheet

LTC1877
13
1877fb
temperature of the part. If the junction temperature reaches
approximately 150°C, both power switches will be turned
off and the SW node will become high impedance.
To avoid the LTC1877 from exceeding the maximum junc-
tion temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
T
R
= (P
D
)(θ
JA
)
where P
D
is the power dissipated by the regulator and θ
JA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, T
J
, is given by:
T
J
= T
A
+ T
R
where T
A
is the ambient temperature.
As an example, consider the LTC1877 in dropout at an
input voltage of 3V, a load current of 500mA, and an am-
bient temperature of 70°C. From the typical performance
graph of switch resistance, the R
DS(ON)
of the P-channel
switch at 70°C is approximately 0.9Ω. Therefore, power
dissipated by the part is:
P
D
= I
LOAD
2
• R
DS(ON)
= 0.225W
For the MSOP package, the θ
JA
is 150°C/W. Thus, the
junction temperature of the regulator is:
T
J
= 70°C + (0.225)(150) = 104°C
which is below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction temperature
is lower due to reduced switch resistance (R
DS(ON)
).
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
When a load step occurs, V
OUT
immediately shifts by an
amount equal to (ΔI
LOAD
• ESR), where ESR is the effective
series resistance of C
OUT
. ΔI
LOAD
also begins to charge
or discharge C
OUT
, which generates a feedback error
signal. The regulator loop then acts to return V
OUT
to its
steady-state value. During this recovery time V
OUT
can be
monitored for overshoot or ringing that would indicate a
stability problem. The internal compensation provides
adequate compensation for most applications. But if ad-
ditional compensation is required, the I
TH
pin can be used
for external compensation using R
C
, C
C1
, as shown in
Figure 7. The 220pF capacitor, C
C2
, is typically needed for
noise decoupling.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in paral-
lel with C
OUT
, causing a rapid drop in V
OUT
. No regulator
can deliver enough current to prevent this problem if the
load switch resistance is low and it is driven quickly. The
only solution is to limit the rise time of the switch drive
so that the load rise time is limited to approximately
(25 • C
LOAD
). Thus, a 10μF capacitor charging to 3.3V
would require a 250μs rise time, limiting the charging
current to about 130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC1877. These items are also illustrated graphically
in the layout diagram of Figure 7. Check the following in
your layout:
1. Are the signal and power grounds segregated? The
LTC1877 signal ground consists of the resistive divider,
the optional compensation network (R
C
and C
C1
) and
C
C2
. The power ground consists of the (–) plate of C
IN
,
the (–) plate of C
OUT
and Pin 4 of the LTC1877. The power
ground traces should be kept short, direct and wide. The
signal ground and power ground should converge to a
common node in a star-ground confi guration.
2. Does the V
FB
pin connect directly to the feedback resis-
tors? The resistive divider R1/R2 must be connected
between the (+) plate of C
OUT
and signal ground.
3. Does the (+) plate of C
IN
connect to V
IN
as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node SW away from sensitive small
signal nodes.
APPLICATIONS INFORMATION