Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - DC/DC voltage regulator Holder SSOP 16

LTC1875

1875f

15µA Quiescent Current

1.5A Monolithic Synchronous

Step-Down Regulator

■

Portable Computers

■

Portable Instruments

■

Wireless Modems

, LTC and LT are registered trademarks of Linear Technology Corporation.

High Efficiency Step-Down Converter

■

High Efficiency: Up to 95%

■

Low Quiescent Current: Only 15µA with No Load

■

550kHz Constant Frequency Operation

■

2.65V to 6V Input Voltage Range

■

OUT

from 0.8V to V

, I

OUT

to 1.5A

■

True PLL Frequency Locking from 350kHz to 750kHz

■

Power Good Output Voltage Monitor

■

Low Dropout Operation: 100% Duty Cycle

■

Burst Mode

or Pulse Skipping Operation

■

Current Mode Operation for Excellent Line and Load

Transient Response

■

Shutdown Mode Draws <1µA Supply Current

■

±2% Output Voltage Accuracy

■

Overcurrent and Overtemperature Protected

■

Available in 16-Lead SSOP Package

The LTC

1875 is a high efficiency 1.5A monolithic syn-

chronous buck regulator using a constant frequency,

current mode architecture. Operating supply current is

only 15µA with no load and drops to <1µA in shutdown.

The input supply voltage range of 2.65V to 6V makes the

LTC1875 ideally suited for single Li-Ion battery-powered

applications. 100% duty cycle provides low dropout op-

eration, extending battery life in portable systems.

The switching frequency is internally set to 550kHz, allow-

ing the use of small surface mount inductors and capaci-

tors. For noise sensitive applications, the LTC1875 can be

externally synchronized from 350kHz to 750kHz. Burst

Mode operation is inhibited during synchronization or

when the SYNC/MODE pin is pulled low.

The internal synchronous switch increases efficiency and

eliminates the need for an external Schottky diode. Low

output voltages are easily supported with a 0.8V feedback

reference voltage. The LTC1875 is available in a 16-lead

SSOP package.

Burst Mode is a registered trademark of Linear Technology Corporation.

RUN/SS

SYNC/MODE

PGOOD

SWP

SWN

PGND

LTC1875

28.0k

: TAIYO YUDEN CERAMIC JMK325BJ226MM

OUT

: SANYO POSCAP 6TPA47M

L1: TOKO 646CY-6R8M

OUT

CONNECTED TO V

(MINUS SWITCH AND L1 VOLTAGE DROP) FOR 2.65V < V

< 3.3V

1875 TA01

220pF

150k

88.7k

OUT

47µF

OUT

3.3V

6.8µH

SGND

47pF

22µF

2.65V TO 6V

Efficiency vs Output Load Current

OUPUT CURRENT (mA)

EFFICIENCY (%)

100

0.1 10 100

1875 TA01a

1 1000

Burst Mode OPERATION

OUT

= 3.3V

L = 6.8µH

= 4.2V

= 6V

= 3.6V

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

Summary of content (20 pages)

PAGE 1
LTC1875 15µA Quiescent Current 1.5A Monolithic Synchronous Step-Down Regulator U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO High Efficiency: Up to 95% Low Quiescent Current: Only 15µA with No Load 550kHz Constant Frequency Operation 2.65V to 6V Input Voltage Range VOUT from 0.8V to VIN, IOUT to 1.
PAGE 2
LTC1875 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) Input Supply Voltage .................................. – 0.3V to 7V ITH, PLL_LPF Voltages ............................. – 0.3V to 2.7V RUN/SS, VFB Voltages ............................... – 0.3V to VIN SYNC/MODE Voltage ................................. – 0.3V to VIN (VPVIN – VSWP) Voltage ............................... – 0.3V to 7V VSWN Voltage .............................................. – 0.
PAGE 3
LTC1875 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VRUN RUN Threshold VRUN Ramping Up IRUN RUN Input Current VRUN = 0V Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1875E is guaranteed to meet specified performance from 0°C to 70°C.
PAGE 4
LTC1875 U W TYPICAL PERFOR A CE CHARACTERISTICS Reference Voltage vs Temperature Output Voltage vs Load Current 1.84 805 804 REFERENCE VOLTAGE (mV) OUTPUT VOLTAGE (V) 1.82 1.80 1.78 1.76 1.74 Burst Mode OPERATION VIN = 3.6V L = 4.7µH 1.72 803 802 801 800 799 798 797 796 795 –50 1.70 0 VIN = 6V 500 1000 1500 LOAD CURRENT (mA) 2000 –25 0 25 50 75 TEMPERATURE (°C) 1875 G07 125 1875 G13 Efficiency vs Output Current Efficiency vs Output Current 95 100 VIN = 3V 90 90 VIN = 4.2V VIN = 3.
PAGE 5
LTC1875 U W TYPICAL PERFOR A CE CHARACTERISTICS Load Step Response (Pulse Skipping Mode) Pulse Skipping Mode Operation VOUT 100mV/DIV IL 200mA/DIV IL 1A/DIV VOUT 100mV/DIV ITH 1V/DIV SW 5V/DIV VIN = 3.6V VOUT = 1.5V L = 6.8µH 100µs/DIV CIN = 22µF COUT = 47µF ILOAD = 200mA to 1700mA 1875 G09 VIN = 4.2V VOUT = 2.5V L = 6.
PAGE 6
LTC1875 U U U PI FU CTIO S SGND (Pin 1): Signal Ground Pin. RUN/SS (Pin 2): Combination of Soft-Start and Run Control Inputs. Forcing this pin below 0.7V shuts down the device. In shutdown all functions are disabled and device draws zero supply current. For the proper operation of the part, force this pin above 2.5V. Do not leave this pin floating. Soft-start can be accomplished by raising the voltage on this pin gradually with an RC circuit. VFB (Pin 3): Feedback Pin.
PAGE 7
2 3 15 RUN/SS VFB 0.6V SYNC/MODE PLL_LPF + 16 SOFT-START 0.8V REF SVIN 0.74V 0.86V 0.8V FREQ SHIFT VCO AND OSC + – – + – + EA SLOPE COMP UVDET OVDET SVIN SLEEP OSC + Y = “0” ONLY WHEN X IS A CONSTANT “1” OV 4 ITH 0.45V Q R 1 SGND 14 PGOOD SWITCHING LOGIC AND BLANKING CIRCUIT SLEEP SHUTDOWN BURST EN THERMAL SHUTDOWN RS LATCH Q S + – – – BURST DEFEAT Y X 0.8V ICOMP – + + RCMP ANTISHOOTTHROUGH – BOTTOM MOSFET 2.
PAGE 8
LTC1875 U OPERATIO (Refer to Block Diagram) Main Control Loop The LTC1875 uses a constant frequency, current mode step-down architecture. Both the top MOSFET and synchronous bottom MOSFET switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch.
PAGE 9
LTC1875 U OPERATIO (Refer to Block Diagram) Power Good Indicator Low Dropout Operation The power good function monitors the output voltage in all modes of operation. Its open-drain output is pulled low when the output voltage is not within ±7.5% of its nominally regulated voltage. The feedback voltage is filtered before it is fed to a power good window comparator in order to prevent false tripping of the power good signal during fast transients.
PAGE 10
LTC1875 Slope Compensation and Inductor Peak Current Slope compensation is required in order to prevent subharmonic oscillation at high duty cycles. It is accomplished by internally adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. As a result, the maximum inductor peak current is reduced for duty cycles > 40%. This is shown in the decrease of the inductor peak current as a function of duty cycle graph in Figure 3.
PAGE 11
LTC1875 U W U U APPLICATIO S I FOR ATIO CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a trapezoidal waveform of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS input capacitor current is given by: IRMS(CIN) ≅ IOMAX [VOUT (VIN – VOUT )]1/ 2 VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2.
PAGE 12
LTC1875 U W U U APPLICATIO S I FOR ATIO 0.8V ≤ VOUT ≤ 6V RLP 2.4V R1 VFB PLL_LPF R2 LTC1875 CLP SYNC/ MODE SGND 1875 F04 DIGITAL PHASE/ FREQUENCY DETECTOR VCO Figure 4. Setting the LTC1875 Output Voltage Phase-Locked Loop and Frequency Synchronization The LTC1875 has an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop. This allows the MOSFET turn-on to be locked to the rising edge of an external frequency source.
PAGE 13
LTC1875 U W U U APPLICATIO S I FOR ATIO Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) Where L1, L2, etc. are the individual losses as a percentage of input power. the internal power MOSFET switches.
PAGE 14
LTC1875 U W U U APPLICATIO S I FOR ATIO To avoid the LTC1875 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. Normally, some iterative calculation is required to determine a reasonably accurate value.
PAGE 15
LTC1875 U W U U APPLICATIO S I FOR ATIO PC Board Layout Checklist As with all high frequency switchers, when considering layout, care must be taken in order to achieve optimal electrical, thermal and noise performance. Figure 8 is a sample of PC board layout for the design example shown in Figure 9. A 4-layer PC board is used in this design. Several guidelines are followed in this layout: 1.
PAGE 16
LTC1875 U W U U APPLICATIO S I FOR ATIO 4. Place the small-signal components away from high frequency switching nodes. In the layout shown in Figure 8, all of the small-signal components have been placed on one side of the IC and all of the power components have been placed on the other. Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL = 450mA and f = 550kHz in equation (3) gives: 5.
PAGE 17
LTC1875 U W U U APPLICATIO S I FOR ATIO RSVIN 10Ω CSVIN 0.1µF 13 RPG 100k SVIN 14 POWER GOOD 15 SYNC/MODE PGOOD PVIN RSS 1M PVIN 2 PGND RUN/SS PGND CSS 0.1µF LTC1875 16 SWP SWP PLL_LPF SWN SWN 4 CC2 220pF VFB ITH CC1 47pF SGND RC 150k 8 9 7 CIN2 10µF CIN1 10µF VIN 2.65V TO 4.2V GND 10 5 12 COUT 47µF L1 4.7µH VOUT* 2.5V/1.
PAGE 18
LTC1875 U TYPICAL APPLICATIO Single Li-Ion to 1.8V/1.5A Regulator Using All Ceramic Capacitors RSVIN 10Ω CSVIN 0.1µF 13 RPG 100k SVIN 14 POWER GOOD 15 SYNC/MODE PGOOD PVIN RSS 1M PVIN 2 PGND RUN/SS PGND CSS 0.1µF LTC1875 16 SWP SWP PLL_LPF SWN SWN 4 CC2 220pF VFB ITH CC1 47pF SGND 8 9 7 CIN2 10µF CIN1 10µF VIN 3V TO 4.2V GND 10 5 12 COUT 47µF L1 4.7µH VOUT* 1.8V/1.
PAGE 19
LTC1875 U PACKAGE DESCRIPTION GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 TYP RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .053 – .068 (1.351 – 1.727) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.
PAGE 20
LTC1875 U TYPICAL APPLICATIO Single Li-Ion to 3.3V/1A Regulator Using All Ceramic Capacitors RSVIN 10Ω CSVIN 0.1µF 13 RPG 100k SVIN 14 POWER GOOD 15 SYNC/MODE PGOOD PVIN RSS 1M PVIN 2 PGND RUN/SS PGND CSS 0.1µF LTC1875 16 PLL_LPF SWP SWP SWN SWN 4 CC2 220pF CC1 47pF 9 CIN2 10µF VIN 3V TO 4.2V GND 10 5 12 L1 4.7µH COUT 47µF VOUT 3.3V* 1A** 6 11 VFB SGND CIN1 10µF 7 3 ITH RC 150k 8 1 R1 1.