Datasheet

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LTC1863L/LTC1867L

1863l7lfc

BLOCK DIAGRAM

DESCRIPTION

FEATURES

APPLICATIONS

Industrial Process Control

High Speed Data Acquisition

Battery Operated Systems

Multiplexed Data Acquisition Systems

Imaging Systems

Sample Rate: 175ksps

16-Bit No Missing Codes and ±3LSB Max INL

8-Channel Multiplexer with:

Single Ended or Differential Inputs and

Unipolar or Bipolar Conversion Modes

SPI™/MICROWIRE™ Serial I/O

2.7V Guaranteed Supply Voltage

Pin Compatible with LTC1863/LTC1867

True Differential Inputs

On-Chip or External Reference

Low Power: 750μA at 175ksps, 300μA at 50ksps

Sleep Mode

Automatic Nap Mode Between Conversions

16-Pin Narrow SSOP Package

The LTC

1863L/LTC1867L are pin compatible, 8-channel

12-/16-bit A/D converters with serial I/O and an internal

reference.

The 8-channel input multiplexer can be conﬁ gured for

either single-ended or differential inputs and unipolar or

bipolar conversions (or combinations thereof). The ADCs

convert 0V to 2.5V unipolar inputs or ±1.25V bipolar

inputs. The ADCs typically draw only 750μA from a single

2.7V supply. The automatic nap and sleep modes beneﬁ t

power sensitive applications.

The LTC1867L’s DC performance is outstanding with a

±3LSB INL speciﬁ cation and 16-bit no missing codes

over temperature.

Housed in a compact, narrow 16-pin SSOP package, the

LTC1863L/LTC1867L can be used in space-sensitive as

well as low power applications.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7/COM

GND

SDI

SDO

SCK

CS/CONV

REF

1863L7L BD

SERIAL

PORT

ANALOG

INPUT

MUX

REFCOMP

INTERNAL

1.25V REF

LTC1863L/LTC1867L

12-/16-BIT

175ksps

ADC

–

Integral Nonlinearity vs Output Code

(LTC1867L)

OUTPUT CODE

INL (LSB)

0.5

1.0

65536

1863L7L G01

–0.5

–1.0

–2.0

16384

32768

49152

–1.5

2.0

1.5

= 2.7V

SAMPLE

= 175ksps

Micropower, 3V,

12-/16-Bit, 8-Channel

175ksps ADCs

Summary of content (16 pages)

PAGE 1
LTC1863L/LTC1867L Micropower, 3V, 12-/16-Bit, 8-Channel 175ksps ADCs DESCRIPTION FEATURES n n n n n n n n n n n n The LTC®1863L/LTC1867L are pin compatible, 8-channel 12-/16-bit A/D converters with serial I/O and an internal reference. Sample Rate: 175ksps 16-Bit No Missing Codes and ±3LSB Max INL 8-Channel Multiplexer with: Single Ended or Differential Inputs and Unipolar or Bipolar Conversion Modes SPI™/MICROWIRE™ Serial I/O 2.
PAGE 2
LTC1863L/LTC1867L ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) Supply Voltage (VDD) ................................... –0.3V to 6V Analog Input Voltage CH0-CH7/COM (Note 3) ...........– 0.3V to (VDD + 0.3V) VREF, REFCOMP (Note 4) ......... –0.3V to (VDD + 0.3V) Digital Input Voltage (SDI, SCK, CS/CONV) (Note 4) ................................................. –0.3V to 10V Digital Output Voltage (SDO) ....... –0.3V to (VDD + 0.3V) Power Dissipation ............................................
PAGE 3
LTC1863L/LTC1867L CONVERTER CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VDD = 2.7V, external VREF = 1.
PAGE 4
LTC1863L/LTC1867L DIGITAL INPUTS AND DIGITAL OUTPUTS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS IIN Digital Input Current VIN = 0V to VDD CIN Digital Input Capacitance VOH High Level Output Voltage (SDO) VOL Low Level Output Voltage (SDO) LTC1863L/LTC1867L/LTC1867LA MIN TYP MAX ● VDD = 2.7V, IO = –10μA VDD = 2.7V, IO = –200μA ● VDD = 2.7V, IO = 160μA VDD = 2.
PAGE 5
LTC1863L/LTC1867L TIMING CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) Note 4: When these pin voltages are taken below GND, they will be clamped by internal diodes. This product can handle input currents of greater than 100mA below GND without latchup. These pins are not clamped to VDD. Note 5: VDD = 2.7V, fSAMPLE = 175ksps and fSCK = 20MHz at 25°C, t r = tf = 5ns and VIN– = 1.
PAGE 6
LTC1863L/LTC1867L TYPICAL PERFORMANCE CHARACTERISTICS (LTC1867L) Total Harmonic Distortion vs Input Frequency –20 –100 SFDR –70 THD –60 –50 –40 VDD = 3V –30 INTERNAL REF fSAMPLE = 175ksps –20 10 1 INPUT FREQUENCY (kHz) –50 –60 –70 –80 600 500 400 300 200 –90 –100 100 10 100 RIPPLE FREQUENCY (kHz) 1 100 1000 1 Supply Current vs Supply Voltage Histogram for 4096 Conversions (LTC1867L) Supply Current vs Temperature 1500 fSAMPLE = 175ksps 1200 fSAMPLE = 175ksps INTERNAL REF 1000 1000 900 800
PAGE 7
LTC1863L/LTC1867L TYPICAL PERFORMANCE CHARACTERISTICS (LTC1863L/ LTC1867L) Differential Nonlinearity vs Output Code (LTC1863L) 1.00 1.00 0.75 0.75 0.50 0.50 0.25 0.25 DNL (LSB) INL (LSB) Integral Nonlinearity vs Output Code (LTC1863L) 0 0 –0.25 –0.25 –0.50 –0.50 –0.75 –0.75 –1.00 0 512 1024 1536 2048 2560 3072 3584 4096 CODE 1863L7L G16 –1.00 0 512 1024 1536 2048 2560 3072 3584 4096 CODE 1863L7L G17 PIN FUNCTIONS CHO-CH7/COM (Pins 1-8): Analog Input Pins.
PAGE 8
LTC1863L/LTC1867L TYPICAL CONNECTION DIAGRAM ±1.25V DIFFERENTIAL INPUTS 2.5V SINGLE-ENDED INPUT + CH0 VDD – CH1 GND CH2 SDI LTC1863L/ CH3 SDO LTC1867L + CH4 SCK CH5 CS/CONV CH6 VREF CH7/COM 2.7V TO 3.6V 10μF DIGITAL I/O 1.25V 2.2μF REFCOMP 2.5V 10μF 1863L7L TCD TEST CIRCUITS Load Circuits for Access Timing Load Circuits for Output Float Delay 2.7V 2.
PAGE 9
LTC1863L/LTC1867L APPLICATIONS INFORMATION Overview Examples of Multiplexer Options 4 Differential The LTC1863L/LTC1867L are complete, low power, multiplexed ADCs. They consist of a 12-/16-bit, 175ksps capacitive successive approximation A/D converter, a precision internal reference, a conﬁgurable 8-channel analog input multiplexer (MUX) and a serial port for data transfer. Conversions are started by a rising edge on the CS/CONV input. Once a conversion cycle has begun, it cannot be restarted.
PAGE 10
LTC1863L/LTC1867L APPLICATIONS INFORMATION Table 2. Channel Conﬁguration (When COM = 1, CH7/COM Pin Is Used as COMMON) CHANNEL CONFIGURATION “+” “–” CH0 CH7/COM SD 1 OS 0 S1 0 S0 0 COM 1 1 0 0 1 1 CH2 CH7/COM 1 0 1 0 1 CH4 CH7/COM 1 0 1 1 1 CH6 CH7/COM 1 1 0 0 1 CH1 CH7/COM 1 1 0 1 1 CH3 CH7/COM 1 1 1 0 1 CH5 CH7/COM Driving the Analog Inputs The analog inputs of the LTC1863L/LTC1867L are easy to drive.
PAGE 11
LTC1863L/LTC1867L APPLICATIONS INFORMATION DC Performance One way of measuring the transition noise associated with a high resolution ADC is to use a technique where a DC signal is applied to the input of the ADC and the resulting output codes are collected over a large number of conversions. For example, in Figure 2 the distribution of output codes is shown for a DC input that had been digitized 4096 times. The distribution is Gaussian and the RMS code transition noise is about 1.6LSB. 1200 VDD = 2.
PAGE 12
LTC1863L/LTC1867L APPLICATIONS INFORMATION Total Harmonic Distortion Total Harmonic Distortion (THD) is the ratio of the RMS sum of all harmonics of the input signal to the fundamental itself. The out-of-band harmonics alias into the frequency band between DC and half the sampling frequency. THD is expressed as: V22 + V32 + V42 ... + VN2 THD = 20 log V1 where V1 is the RMS amplitude of the fundamental frequency and V2 through VN are the amplitudes of the second through Nth harmonics.
PAGE 13
LTC1863L/LTC1867L APPLICATIONS INFORMATION If the CS/CONV returns low during a bit decision, it can create a small error. For best performance ensure that the CS/CONV returns low either within 100ns after the conversion starts (i.e. before the ﬁrst bit decision) or after the conversion ends. If CS/CONV is low when the conversion ends, the MSB bit will appear on SDO at the end of the conversion and the ADC will remain powered up.
PAGE 14
LTC1863L/LTC1867L APPLICATIONS INFORMATION CS/CONV tACQ NOT NEEDED FOR LTC1863 SCK SDI DON'T CARE 1 2 3 4 5 6 7 COM UNI SLP 8 9 10 11 12 SD 0S S1 S0 MSB = D11 D10 D9 D8 D6 D5 D4 D3 D2 D1 D0 MSB = D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 13 14 15 DON'T CARE 16 DON'T CARE tCONV SDO (LTC1863) Hi-Z SDO (LTC1867) D7 tCONV D3 D2 D1 D0 Hi-Z 1863L7L F07 011...111 111...111 BIPOLAR ZERO 011...110 111...
PAGE 15
LTC1863L/LTC1867L PACKAGE DESCRIPTION GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ±.0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .0532 – .0688 (1.35 – 1.75) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .
PAGE 16
LTC1863L/LTC1867L RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1417 14-Bit, 400ksps Serial ADC 20mW, Unipolar or Bipolar, Internal Reference, SSOP-16 Package LT1468/LT1469 Single/Dual 90MHz, 22V/μs, 16-Bit Accurate Op Amps Low Input Offset: 75μV/125μV LTC1609 16-Bit, 200ksps Serial ADC 65mW, Conﬁgurable Bipolar and Unipolar Input Ranges, 5V Supply LT1790 Micropower Low Dropout Reference 60μA Supply Current, 10ppm/°C, SOT-23 Package LT1790A-1.