Datasheet

LTC1863L/LTC1867L
12
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1863l7lfe
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal to the funda-
mental itself. The out-of-band harmonics alias into the
frequency band between DC and half the sampling fre-
quency. THD is expressed as:
THD = 20log
V
2
2
+ V
3
2
+ V
4
2
...+ V
N
2
V
1
where V
1
is the RMS amplitude of the fundamental fre-
quency and V
2
through V
N
are the amplitudes of the sec-
ond through Nth harmonics.
Internal Reference
T he LTC1863L and LTC1867L have an on-chip, tem-
perature compensated, curvature corrected, bandgap
reference that is factory trimmed to 1.25V. It is internally
connected to a reference amplifier and is available at V
REF
(Pin 10). A 3k resistor is in series with the output so that
it can be easily overdriven by an external reference if bet-
ter drift and/or accuracy are required as shown in Figure
4. The reference amplifier gains the V
REF
voltage by 2x
to 2.5V at REFCOMP (Pin 9). This reference amplifier
APPLICATIONS INFORMATION
compensation pin, REFCOMP, must be bypassed with a
10µF ceramic or tantalum in parallel with a 0.1µF ceramic
for best noise performance.
Digital Interface
The LTC1863L and LTC1867L have a very simple digital
interface that is enabled by the control input, CS/CONV. A
logic rising edge applied to the CS/CONV input will initi
-
ate a conversion. After the conversion, taking CS/CONV
low will enable the serial port and the ADC will present
digital data in two
’s complement format in bipolar mode
or straight binary format in unipolar mode, through the
SCK/SDO serial port.
Internal Clock
The internal clock is factory trimmed to achieve a typi
-
cal conversion time of 3.2µs and a maximum conversion
time, 3.7µs, over the full operating temperature range.
The typical acquisition time is 1.68µs, and a throughput
sampling rate of 175ksps is tested and guaranteed.
Automatic Nap Mode
The LTC1863L and LTC1867L go into automatic nap
mode when CS/CONV is held high after the conversion
is complete. With a typical operating current of 750µA
and automatic 170µA nap mode between conversions, the
power dissipation drops with reduced sample rate. The
ADC only keeps the V
REF
and REFCOMP voltages active
when the part is in the automatic nap mode. The slower
the sample rate allows the power dissipation to be lower
(see Figure 5).
Figure 4b. Using the LT1790A-1.25 as an External Reference
Figure 4a. LTC1867L Reference Circuit
Figure 5. Supply Current vs f
SAMPLE
R2
R3
REFERENCE
AMP
10µF
2.2µF
REFCOMP
GND
V
REF
R1
3k
10
9
15
1.25V
2.5V
LTC1863L/LTC1867L
1863L7L F04a
BANDGAP
REFERENCE
10
0.1µF10µF
1863L7L F04b
LT1790A-1.25
V
OUT
V
IN
3V
V
REF
LTC1863L/
LTC1867L
GND
REFCOMP
15
9
+
2.2µF
f
SAMPLE
(ksps)
1
500
SUPPLY CURRENT (µA)
600
700
800
10 100 1000
1863L7L G09
400
300
200
100
V
DD
= 2.7V
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