Datasheet

10
LTC1821
versatility of the interface also allows the use of the input
and DAC registers in a master slave or edge- triggered
configuration. This mode of operation occurs when WR
and LD are tied together. The asynchronous clear pin
resets the LTC1821 to zero scale and the LTC1821-1 to
midscale. CLR resets both the input and DAC registers.
These devices also have a power-on reset. Table 1 shows
the truth table for the LTC1821.
Figure 1. Unipolar Operation (2-Quadrant Multiplication) V
OUT
= 0V to –V
REF
APPLICATIONS INFORMATION
WUU
U
V
CC
LTC1821
R
FB
R
FB
R
OFS
R
OFS
5V
LD
LD
10
9
24 23
7
18
2
13
15
20
117 16
R1
R
COM
8
REF
11
12
0.1µF
0.1µF
15V
–15V
14
I
OUT
V
OUT
22pF
V
OUT
=
0V TO
–V
REF
1821 F01
AGNDF AGNDS
DGND
WR
25 TO 36,
3 TO 6
WR
CLR DNC* DNC*
CLR
V
REF
–
+
16-BIT DAC
R1
R2
16
DATA
INPUTS
0.1µF
Unipolar Binary Code Table
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
–V
REF
(65,535/65,536)
–V
REF
(32,768/65,536) = –V
REF
/2
–V
REF
(1/65,536)
0V
LSB
1111 1111 1111
0000 0000 0000
0000 0000 0001
0000 0000 0000
ANALOG OUTPUT
V
OUT
MSB
1111
1000
0000
0000
19
DNC*
21
NC
22
V
–
V
+
*DO NOT CONNECT
Unipolar Mode
(2-Quadrant Multiplying, V
OUT
= 0V to –V
REF
)
The LTC1821 can be used to provide 2-quadrant multiply-
ing operation as shown in Figure 1. With a fixed –10V
reference, the circuit shown gives a precision unipolar 0V
to 10V output swing.