Datasheet

3
LTC1771
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LTC1771S8: T
J
= T
A
+ (P
D
)(110°C/W)
LTC1771MS8: T
J
= T
A
+ (P
D
)(150°C/W)
Note 3: The LTC1771E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC1771I is guaranteed and tested
over the –40°C to 85°C operating temperature range.
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are T
A
= 25°C.
V
IN
= 10V, V
RUN
= open unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
RUN/SS
RUN/SS Pin Threshold V
RUN/SS
Rising ● 0.5 1.0 2 V
I
RUN
Source Current V
RUN
= 0V, V
IN
= 2.8V to 18V 0.3 1 3 µA
PGATE t
r
, t
f
PGATE Transition Time (Note 7)
Rise Time C
LOAD
= 2000pF 70 140 ns
Fall Time C
LOAD
= 2000pF 70 140 ns
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 5: The LTC1771 is tested in a feedback loop that servos V
FB
to the
balance point for the error amplifier (V
ITH
= 1.23V).
Note 6: No-load supply current consists of sleep mode current (9µA
typical) plus a small switching component necessary to overcome
Schottky diode leakage and feedback resistor current.
Note 7: t
r
and t
f
are measured at 10% to 90% levels.
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Efficiency vs Input Voltage
INPUT VOLTAGE (V)
2
60
EFFICIENCY (%)
70
80
90
100
46810
1771 G01
12 14 16 18 20
I
LOAD
= 50mA
I
LOAD
= 1mA
FIGURE 1 CIRCUIT
I
LOAD
= 1A
LOAD CURRENT (mA)
0.1
40
EFFICIENCY (%)
50
60
70
80
1 10 1000100
1771 G02
30
20
10
0
90
100
Burst Mode OPERATION
ENABLED
Burst Mode OPERATION
DISABLED
V
IN
= 10V
FIGURE 1 CIRCUIT
INPUT VOLTAGE (V)
0
∆V
OUT
(%)
0
0.1
0.2
20
1771 G03
–0.1
–0.2
–0.4
5
10
15
–0.3
0.4
0.3
I
LOAD
= 100mA
I
LOAD
= 1A
FIGURE 1 CIRCUIT
Efficiency vs Load Current Line Regulation