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LTC1759

Smart Battery Charger

The LTC

1759 Smart Battery Charger is a single chip

charging solution that dramatically simplifies construc-

tion of an SBS compliant system. The LTC1759 imple-

ments a Level 2 charger function whereby the charger can

be programmed by the battery or by the host. A thermistor

on the battery being charged is monitored for tempera-

ture, connectivity and battery type information. The SMBus

interface remains alive when the AC power adapter is

removed and responds to all SMBus activity directed to it,

including thermistor status (via the ChargerStatus com-

mand). The charger also provides an interrupt to the host

whenever a status change is detected (e.g., battery

removal,

AC adapter connection).

Charging current and voltage are restricted to chemistry

specific limits for improved system safety and reliability.

Limits are programmable by two external resistors. Addi-

tionally, the maximum average current from the AC adapter

is programmable to avoid overloading the adapter when

simultaneously supplying load current and charging cur-

rent. When supplying system load current, charging cur-

rent is automatically reduced to prevent adapter overload.

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Single Chip Smart Battery Charger Controller

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100% Compliant (Rev 1.0) SMBus Support

Allows for Operation with or without Host

■

SMBus Accelerator Improves SMBus Timing

■

Hardware Interrupt and SMBAlert Response

Eliminate Interrupt Polling

■

High Efficiency Synchronous Buck Charger

■

0.5V Dropout Voltage; Maximum Duty Cycle > 99.5%

■

AC Adapter Current Limit Maximizes Charge Rate*

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1% Voltage Accuracy; 5% Current Accuracy

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Up to 8A Charging Current Capability

■

Dual 10-Bit DACs for Charger Voltage and Current

Programming

■

User-Selectable Overvoltage and Overcurrent Limits

■

High Noise Immunity Thermistor Sensor

■

Small 36-Lead Narrow (0.209") SSOP Package

, LTC and LT are registered trademarks of Linear Technology Corporation.

Figure 1. 4A SMBus Smart Battery Charger

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Portable Computers

■

Portable Instruments

■

Docking Stations

*US Patent Number 5,723,970

SYNC

SDB

CHGEN

LIMIT

DGND

SET

PROG

COMP1

AGND

RNR

THERM

SDA

SCL

INTB

3.83k

1.5k

LTC1759

499Ω

475k

10k

0.1µF

0.33µF

1µF

0.68µF

33k

0.033Ω

200Ω

68Ω

200Ω

15.8k

0.47µF

2.2µF

0.68µF

0.047µF

0.1µF

1µF

15µH

22µF

SYSTEM

POWER

0.025Ω

33k

DCIN

DCDIV

INFET

CLP

CLN

TGATE

BOOSTC

GBIAS

BOOST

BGATE

SPIN

SENSE

BAT1

BAT2

SET

PGND

0.015µF

22µF

0.1µF

10µF

35V

ADAPTER

INPUT

SMART

BATTERY

INTB

SMBus

HOST

SCL

SDA

1759 F01

APPLICATIO S

FEATURES

TYPICAL APPLICATIO

DESCRIPTIO

Summary of content (28 pages)

PAGE 1
LTC1759 Smart Battery Charger U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Single Chip Smart Battery Charger Controller 100% Compliant (Rev 1.0) SMBus Support Allows for Operation with or without Host SMBus Accelerator Improves SMBus Timing Hardware Interrupt and SMBAlert Response Eliminate Interrupt Polling High Efficiency Synchronous Buck Charger 0.5V Dropout Voltage; Maximum Duty Cycle > 99.
PAGE 2
LTC1759 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) Voltage at VCC, UV, BAT1, CLP,CLN, SPIN, SENSE with respect to AGND ....................– 0.3V to 27V Voltage at DCIN, BAT2 with Respect to DGND ....................................................– 0.3V to 27V Voltage at INTB, SDA, SCL, DCDIV with Respect to DGND ..................................................... – 0.3V to 7V BOOST, BOOSTC Voltage with Respect to VCC ........
PAGE 3
LTC1759 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range (TJ = 0°C to 100°C), otherwise specifications are TA = 25°C. VCC = DCIN = 18V, VBAT1, 2 = 12.6V, VDD = 3.3V unless otherwise specified.
PAGE 4
LTC1759 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range (TJ = 0°C to 100°C), otherwise specifications are TA = 25°C. VCC = DCIN = 18V, VBAT1, 2 = 12.6V, VDD = 3.3V unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS 200 nA kΩ Thermistor Decoder (Note 11) Combined Input Leakage on RNR and THERM Thermistor Trip (COLD/OR) RWEAK = 475k ±1% ● 80 100 120 Thermistor Trip (IDEAL/COLD) RNR = 10k ±1 % ● 26.4 30 33.
PAGE 5
LTC1759 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range (TJ = 0°C to 100°C), otherwise specifications are TA = 25°C. VCC = DCIN = 18V, VBAT1, 2 = 12.6V, VDD = 3.3V unless otherwise specified.
PAGE 6
LTC1759 U W TYPICAL PERFOR A CE CHARACTERISTICS Charger Efficiency SMBus Accelerator Operation DCDIV Trip Point vs Temperature 100 1.10 16.8V VCC = 5V CLD = 200pF TA = 25°C 5V 95 1.05 VDD = 5.5V 90 DCDIV (V) EFFICIENCY (%) 12.6V LTC1759 85 RPULLUP = 15k 80 0V 1.00 VDD = 3V 0.95 75 VIN = 20V 70 0.90 1.5 2.5 3.5 CHARGING CURRENT (A) 0.
PAGE 7
LTC1759 U U U PIN FUNCTIONS Input Power-Related Pins UV (Pin 7): Charger Section Undervoltage Lockout Pin. The rising threshold is 6.7V with a hysteresis of 0.5V. Switching stops in undervoltage lockout. Connect this input to the input voltage source with no resistor divider. UV must be pulled below 0.7V when there is no input voltage source (5k resistor from adapter output to ground is required) to obtain the lowest quiescent battery current. INFET (Pin 8): Gate Drive to Input P-channel FET.
PAGE 8
LTC1759 U U U PIN FUNCTIONS Internal Power Supply Pins VC (Pin 27): This is the control signal of the inner loop of the current mode PWM. Switching starts at 0.9V. Higher VC corresponds to higher charging current in normal operation. A capacitor of at least 0.33µF to AGND filters out noise and controls the rate of soft start. VDD (Pin 16): Low Voltage Power Supply Input. Bypass this pin with 0.1µF. PROG (Pin 28): This pin is for programming the charging current and for system loop compensation.
PAGE 9
LTC1759 W BLOCK DIAGRA VCC 7.8V UV 7 8 INFET 0.2V + + – – + BAT1 31 6.7V 6.7V – VCC 32 1 BOOST – SDB 5 PWM LOGIC 1.3V ONE SHOT SYNC 4 2 TGATE SHDN + 200kHz OSC 3 SW 8.9V 34 GBIAS S 35 BGATE Q R 36 PGND SLOPE COMP 33 BOOSTC – + B1 + C1– + CA2– VC 27 CLN 10 92mV + VREF 1k CA1– 28 PROG – + VA + –CL1 AC_PRESENT 21 DCDIV 22 DCIN 1V 10µA – PWR_FAIL INTB 13 + 20k 812.
PAGE 10
LTC1759 TEST CIRCUITS Test Circuit 1 SPIN LTC1759 CA1 CA2 1k + 0.047µF + – VC 75k – SENSE RS3 200Ω BAT1 RS2 200Ω RSENSE 10Ω + VBAT VREF PROG 1µF RSET 300Ω + LT1006 1k + 1759 TC01 – ≈ 0.65V 20k Test Circuit 2 LTC1759 VSET + VA – VREF PROG IPROG 2k 0.47µF 10 RSET – + + 2.
PAGE 11
LTC1759 U OPERATIO Overview (Refer to Block Diagram and Figure 10) The LTC1759 is composed of a battery charger section, a charger controller, two 10-bit DACs to control charger parameters, a thermistor decoder, limit decoder and an SMBus controller block. If no battery is present, the thermistor decoder indicates a THERM_OR condition and charging is disabled by the charger controller (CHGEN = Low). Charging will also be disabled if AC_PRESENT is low, or the battery thermistor is decoded as THERM_HOT.
PAGE 12
LTC1759 U OPERATIO Table 1: Supported Charger Functions SMBus ADDRESS (7-BIT) COMMAND CODE (8-BIT hex) ChargerSpecInfo() b0001_001 ChargerMode() b0001_001 ChargerStatus() b0001_001 ChargingCurrent() b0001_001 ChargingVoltage() b0001_001 AlarmWarning() b0001_001 LTCVersionFunction() b0001_001 h3c r Register OptionalMfgFunction3() b0001_001 h3d – Not Supported OptionalMfgFunction2() b0001_001 h3e – Not Supported OptionalMfgFunction1() b0001_001 h3f – Not Supported Alert Resp
PAGE 13
LTC1759 U OPERATIO FUNCTION ChargerStatus() FIELD WORD BIT MAPPING POWER-ON RESET VALUE (BINARY) RESET_TO_ZERO 3 0 • 0 – Charging Value Unchanged • 1 – Set Charging Values to Zero NOTE: This function is implemented by forcing the charger to CHARGING_NONE_STATE and not allowing charge to resume until a valid ChargingCurrent() and ChargingVoltage() Pair Is received. • Write Only. Read Will NACK Reserved 15:4 0 • Not Implemented. Writes to These Bits Are Ignored. • Write Only.
PAGE 14
LTC1759 U OPERATIO FIELD WORD BIT MAPPING POWER-ON RESET VALUE (BINARY) THERM_UR 11 Value ALARM_INHIBITED 12 0 POWER_FAIL 13 Value • 0 – VBAT/VDCIN < 0.9 • 1 – VBAT/VDCIN > 0.9 • Read Only. Write Will NACK BATTERY_PRESENT 14 Value • 0 – Battery Is Not Present • 1 – Battery Is Present • Read Only. Write Will NACK AC_PRESENT 15 Value • 0 – Charge Power Is Not Available • 1 – Charge Power Is Available • Read Only.
PAGE 15
LTC1759 U OPERATIO FUNCTION LTCVersionFunction () WORD BIT MAPPING POWER-ON RESET VALUE (BINARY) TERMINATE_ DISCHARGE_ALARM 11 0 • This Bit May Be Used to Signal That the Charger May Be Restarted After a Battery Conditioning Cycle Has Been Completed • Write Only. Read Will NACK • Writing a 0 to This Bit Will Be Ignored • Not Supported by LTC1759 Reserved 10 – • Not Supported by LTC1759 • Write Only.
PAGE 16
LTC1759 U OPERATIO The Charger Controller Block The LTC1759 charger operations are handled by the charger controller block. This block is capable of charging the selected battery autonomously or under host control. The charger controller can request communications with the system management host (SMHost) by asserting INTB = 0; this will cause the SMHost, if present, to poll the LTC1759. The charger controller receives SMBus slave commands from the SMBus controller block.
PAGE 17
LTC1759 U OPERATIO Table 3.
PAGE 18
LTC1759 U OPERATIO # CONDITION ACTION 12 CHARGING_CONTROLLED_STATE = 1 AND THERM_HOT Changes from 0 to 1 AND THERM_UR = 0 CHARGING_NONE_STATE = 1 The Charger_Controller Stops Charging the Battery. It Cannot “Wake Up” Charge Again Until Condition 15 Is Met. It Can Supply “Controlled Charge” to the Battery If Conditions 8 or 9 Are Met 13 CHARGING_CONTROLLED_STATE = 1 AND THERM_UR Changes from 1 to 0 AND THERM_HOT = 1 CHARGING_NONE_STATE = 1 The Charger_Controller Stops Charging the Battery.
PAGE 19
LTC1759 U OPERATIO with RTHERM. The resulting voltage is monitored at THERM, compared to an internal reference and sampled at the output of the cold and hot comparators. This detection mode is only activated if OR tested low. The Thermistor Decoder Block This block measures the resistance of the battery’s thermistor and features high noise immunity at critical trip points. The low power standby mode supports all SMB charger reporting requirements when AC is not present.
PAGE 20
LTC1759 U OPERATIO When AC power is not available the thermistor block supports the following low power operating features: provide a measure of safety with a hardware restriction on charging current which cannot be overridden by software. 1. Only the low power THERM_OR detection circuitry is kept alive to support battery present interrupts. Table 6. ILIMIT Trip Points and Ranges 2. The ChargeStatus() read function forces the thermistor block to update thermistor status at the beginning of the read.
PAGE 21
LTC1759 U OPERATIO 25 Table 7. VLIMIT Trip Points and Ranges 0 VLIMIT VOLTAGE VVLIMIT < 0.09VVCCP NOMINAL CHARGING VOLTAGE (VOUT) RANGE 20 GRANULARITY 2465mV < VOUT < 8432mV 16mV 0.17VVDD < VVLIMIT < 0.34VVDD 2465mV < VOUT < 12640mV 16mV 0.42VVCCP < VVLIMIT < 0.59VVDD 2465mV < VOUT < 16864mV 32mV 100k ±1% 0.66VVDD < VVLIMIT < 0.84VVDD 2465mV < VOUT < 21056mV 32mV Open or 0.
PAGE 22
LTC1759 U OPERATIO When wake-up is asserted to the current DAC block, the delta-sigma is then fixed at a value equal to 80mA, independent of the ILIMIT setting. Note: The external resistor connected to the ISET pin must be multiplied by 0.8 to compensate for the 80% maximum duty cycle of the sigma-delta modulator. Note also that the 80% duty cycle converts the rise/fall time mismatches to a small gain error, rather than a nonlinearity.
PAGE 23
LTC1759 U U W U APPLICATIONS INFORMATION Charge Termination Issues Batteries with constant current charging and voltagebased charger termination might experience problems with reductions of charger current caused by adapter limiting. It is recommended that input limiting feature be defeated in such cases. Consult the battery manufacturer for information on how your battery terminates charging.
PAGE 24
LTC1759 U W U U APPLICATIONS INFORMATION Step 1: Determine RSENSE. Using your chosen IMAX for your maximum charge current, calculate the sense resistor value and round to the nearest standard value. Any rounding error is made up by the RSET resistor calculation. The value of the VSENSE voltage is user-definable. A good trade-off between minimize power dissipation in the current sense resistor and maintaining good current scale accuracy is to use VSENSE = 100mV for full-scale current.
PAGE 25
LTC1759 U W U U APPLICATIONS INFORMATION voltage will be pulled down by the constant 30W load until it reaches a lower stable state where the switching regulators can no longer supply full load. This situation can be prevented by utilizing the DCDIV resistor divider, set higher than the minimum adapter voltage where full power can be achieved.
PAGE 26
LTC1759 U U W U APPLICATIONS INFORMATION below ground with the full battery potential, causing a potential for latch-up in any of the devices connected to the SMBus inputs. Therefore it is good design practice to protect the SMBus inputs as shown in Figure 13. PCB Layout Considerations The LTC1759 has two layout critical areas. The first is the ISET pin and the second is the DC/DC converter switching circuity.
PAGE 27
LTC1759 U U W U APPLICATIONS INFORMATION a crude voltage level detector looking for voltage going below approximately one volt on the emitter. The RC circuit consisting of R4 and C1 filters low pulses from the ISET pin. Q2 buffers the RC filter circuit allowing a more logic level type interface. The circuit is powered from the logic output driver of the CHGEN pin of the LTC1759. The circuit does not need any capacitive supply bypassing to function and draws little current.
PAGE 28
LTC1759 U TYPICAL APPLICATION 4A SMBus Smart Battery Charger R1 15.8k R2 1k RCL, 0.033Ω Q1 AC ADAPTER INPUT + C9, 0.1µF C15 10µF 35V VDD Al C14 0.1µF 7 16 4 5 12 RVLIMIT, 33k 25 RILIMIT, 33k 24 18 RSET, 3.83k C11, 1µF 17 28 C13, 0.33µF R4, 1.5k C12, 0.