Datasheet

15
LTC1746
1746f
APPLICATIO S I FOR ATIO
WUUU
Input Range
The input range can be set based on the application. For
oversampled signal processing in which the input fre-
quency is low (<10MHz), the largest input range will
provide the best signal-to-noise performance while main-
taining excellent SFDR. For high input frequencies
(>10MHz), the 2V range will have the best SFDR perfor-
mance but the SNR will degrade by 3.5dB. See the Typical
Performance Characteristics section.
Driving the Encode Inputs
The noise performance of the LTC1746 can depend on the
encode signal quality as much as on the analog input. The
ENC/ENC inputs are intended to be driven differentially,
primarily for noise immunity from common mode noise
sources. Each input is biased through a 6k resistor to a 2V
bias. The bias resistors set the DC operating point for
transformer coupled drive circuits and can set the logic
threshold for single-ended drive circuits.
V
DD
LTC1746
1746 F07
BIAS
V
DD
5V
ENC
ENC
ANALOG INPUT
2V BIAS
2V BIAS
1:4
0.1µF
CLOCK
INPUT
50Ω
6k
6k
TO INTERNAL
ADC CIRCUITS
Figure 7. Transformer Driven ENC/ENC with Equivalent Encode Input Circuit
1746 F08a
ENC2V
V
THRESHOLD
= 2V
ENC
0.1µF
LTC1746
1746 F08b
ENC
ENC
130Ω
3.3V
3.3V
130Ω
D0
Q0
Q0
MC100LVELT22
LTC1746
83Ω83Ω
Figure 8a. Single-Ended ENC Drive,
Not Recommended for Low Jitter
Figure 8b. ENC Drive Using a CMOS-to-PECL Translator