Datasheet

3
LTC1703
1703fa
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: PV
CC
and BV
CC
(V
BOOST
– V
SW
) must be greater than V
GS(ON)
of
the external MOSFETs used to ensure proper operation.
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4: Supply current in normal operation is dominated by the current
needed to charge and discharge the external MOSFET gates. This current
will vary with supply voltage and the external MOSFETs used.
Note 5: Supply current in shutdown is dominated by external MOSFET
leakage and may be significantly higher than the quiescent current drawn
by the LTC1703, especially at elevated temperature.
Note 6: This parameter is guaranteed by correlation and is not tested
directly.
Note 7: Each built-in pull-up resistor attached to the VID inputs also has a
series diode connected to V
CC
to allow input voltages higher than the V
CC
supply without damage or clamping. (See Block Diagram.)
Note 8: Feedback current at FB1 will be higher due to internal VID
resistors.
Note 9: Rise and fall times are measured using 10% and 90% levels. Delay
and nonoverlap times are measured using 50% levels.
The denotes specifications which apply over the full operating
temperature range, otherwise specifications are T
A
= 25°C. V
CC
= 5V unless otherwise specified. (Note 3)
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Switching Characteristics
V
OSC
Oscillator Amplitude 1V
P-P
f
OSC
Oscillator Frequency Test Circuit 1 475 550 750 kHz
Φ
OSC2
Controller 2 Oscillator Phase Relative to Controller 1 180 DEG
DC
MIN1
Minimum Duty Cycle V
FB
< V
MAX
710 %
DC
MIN2
Minimum Duty Cycle V
FB
> V
MAX
0%
DC
MAX
Maximum Duty Cycle 87 90 93 %
t
NOV
Driver Nonoverlap Test Circuit 1 (Note 9) 40 100 ns
t
r
, t
f
Driver Rise/Fall Time Test Circuit 1 (Note 9) 12 80 ns
Feedback Amplifier
A
VFB
FB DC Gain 74 85 dB
GBW FB Gain Bandwidth 25 MHz
I
ERR
FB Sink/Source Current COMP
N
Output ±3 ±10 mA
V
MIN
MIN Comparator Threshold 760 785 mV
V
MAX
MAX Comparator Threshold 815 840 mV
Current Limit Loop
A
VILIM
I
LIM
Gain 40 dB
I
IMAX
I
MAX
Source Current I
MAX
= 0V, LTC1703C –7 –10 13 µA
I
MAX
= 0V, LTC1703I –7 –10 14 µA
Status Outputs
V
FAULT
FAULT Trip Point V
FB
Relative to Regulated V
OUT
+10 +15 +20 %
V
OLF
FAULT Output Low Voltage I
FAULT
= 1mA 0.03 0.1 V
I
FAULT
FAULT Output Current V
FAULT
= 0V 10 µA
t
FAULT
FAULT Delay Time V
FB
> V
FAULT
to FAULT (Note 9) 25 µs
VID Inputs
R11 Resistance Between SENSE and FB1 10 k
V
OUT
Error % Output Voltage Accuracy (Side 1) Programmed from 0.9V to 2V 1.5 1.5 %
R
PULLUP
VID Input Pull-Up Resistance V
DIODE
= 0.6V (Note 7) 40 k
VID
T
VID Input Voltage Threshold V
IL
(2.7V V
CC
5.5V) 0.4 V
V
IH
(2.7V V
CC
5.5V) 1.6 V
I
VID-LEAK
VID Input Leakage Current V
CC
< VID < 7V (Note 7) 0.01 ±1 µA
V
PULLUP
VID Pull-Up Voltage V
CC
= 3.3V 2.8 V
V
CC
= 5V 4.5 V