Datasheet
LTC1661
9
1661fa
OPERATION
Table 2. DAC Control Functions
CONTROL
INPUT REGISTER
STATUS
DAC REGISTER
STATUS
POWER-DOWN STATUS
(SLEEP/WAKE) COMMENTSA3 A2 A1 A0
0 0 0 0 No Change No Update No Change No Operation. Power-Down Status Unchanged
(Part Stays in Wake or Sleep Mode)
0 0 0 1 Load DAC A No Update No Change Load Input Register A with Data. DAC Outputs
Unchanged. Power-Down Status Unchanged
0 0 1 0 Load DAC B No Update No Change Load Input Register B with Data. DAC Outputs
Unchanged. Power-Down Status Unchanged
0 0 1 1 Reserved
0 1 0 0 Reserved
0 1 0 1 Reserved
0 1 1 0 Reserved
0 1 1 1 Reserved
1 0 0 0 No Change Update Outputs Wake Load Both DAC Regs with Existing Contents of Input
Regs. Outputs Update. Part Wakes Up
1 0 0 1 Load DAC A Update Outputs Wake Load Input Reg A. Load DAC Regs with New Contents
of Input Reg A and Existing Contents of Reg B. Outputs
Update. Part Wakes Up
1 0 1 0 Load DAC B Update Outputs Wake Load Input Reg B. Load DAC Regs with Existing
Contents of Input Reg A and New Contents of Reg B.
Outputs Update. Part Wakes Up
1 0 1 1 Reserved
1 1 0 0 Reserved
1 1 0 1 No Change No Update Wake Part Wakes Up. Input and DAC Regs Unchanged. DAC
Outputs Reflect Existing Contents of DAC Regs
1 1 1 0 No Change No Update Sleep Part Goes to Sleep. Input and DAC Regs Unchanged.
DAC Outputs Set to High Impedance State
1 1 1 1 Load DACs A, B with
Same 10-Bit Code
Update Outputs Wake
Load Both Input Regs. Load Both DAC Regs with New
Contents of Input Regs. Outputs Update. Part Wakes Up
D
IN
SCK
CS/LD
A3 A2
INPUT CODE DON’T CARE
A1 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X1 X0
1661 F01
16151413121110987654321
(SCK ENABLED)
(LTC1661
RESPONDS)
CONTROL CODE
INPUT WORD W
0
Figure 1. Register Loading Sequence