Datasheet

LTC1661
4
1661fa
TIMING CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
= 2.7V to 5.5V
t
1
D
IN
Valid to SCK Setup (Note 6)
l
60 ns
t
2
D
IN
Valid to SCK Hold (Note 6)
l
0 ns
t
3
SCK High Time (Note 6)
l
50 ns
t
4
SCK Low Time (Note 6)
l
50 ns
t
5
CS/LD Pulse Width (Note 6)
l
100 ns
t
6
LSB SCK High to CS/LD High (Note 6)
l
50 ns
t
7
CS/LD Low to SCK High (Note 6)
l
30 ns
t
9
SCK Low to CS/LD Low (Note 6)
l
0 ns
t
11
CS/LD High to SCK Positive Edge (Note 6)
l
30 ns
SCK Frequency Square Wave (Note 6)
l
10 MHz
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Nonlinearity and monotonicity are defined from code 20 to code
1023 (full scale). See Applications Information.
Note 3: Digital inputs at 0V or V
CC
.
Note 4: Load is 10kΩ in parallel with 100pF.
Note 5: V
CC
= V
REF
= 5V. DAC switched between 0.1V
FS
and 0.9V
FS
,
i.e., codes k = 102 and k = 922.
Note 6: Guaranteed by design and not subject to test.
TIMING DIAGRAM
D
IN
CS/LD
SCK
A3 A2
1661 TD
A1 X1
X0
t
2
t
9
t
11
t
5
t
7
t
6
t
1
t
3
t
4