Datasheet

LTC1659
6
1659fa
PIN FUNCTIONS
BLOCK DIAGRAM
CLK (Pin 1): Serial Interface Clock. Internal Schmitt trigger
on this input allows direct optocoupler interface.
D
IN
(Pin 2): Serial Interface Data. Data on the D
IN
pin is
latched into the shift register on the rising edge of the
serial clock.
⎯
C
⎯
S/LD (Pin 3): Serial Interface Enable and Load Control.
When
⎯
C
⎯
S/LD is low the CLK signal is enabled, so the data
can be clocked in. When
⎯
C
⎯
S/LD is pulled high, data is loaded
from the shift register into the DAC register, updating the
DAC output and the CLK is disabled internally.
D
OUT
(Pin 4): Output of the Shift Register which Becomes
Valid on the Rising Edge of the Serial Clock.
GND (Pin 5): Ground.
REF (Pin 6): Reference Input. This pin can be tied to V
CC
.
The output will swing from 0V to REF. The typical input
resistance is 28k.
V
OUT
(Pin 7): Buffered DAC Output.
V
CC
(Pin 8): Positive Supply Input. 2.7V ≤ V
CC
≤ 5.5V.
Requires a bypass capacitor to ground.
DAC
REGISTER
LD
12-BIT
SHIFT
REGISTER
POWER-ON
RESET
1659 BD
CLK
1
D
IN
2
D
OUT
4
V
OUT
7
REF
6
GND
5
V
CC
8
3
CS/LD
12-BIT
DAC
+
–