Datasheet

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LTC1659

1659fa

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

12-Bit Rail-to-Rail

Micropower DAC in

MSOP Package

The LTC

1659 is a single supply, rail-to-rail voltage output,

12-bit digital-to-analog converter (DAC) in an MSOP pack-

age. It includes a rail-to-rail output buffer ampliﬁ er and an

easy-to-use 3-wire cascadable serial interface.

The LTC1659 output swings from 0V to REF. The REF input

can be tied to V

which can range from 2.7V to 5.5V.

This allows a rail-to-rail output swing from 0V to V

. The

LTC1659 draws only 250μA from a 5V supply.

Its guaranteed ±0.5LSB maximum DNL makes the LTC1659

excel in calibration, control and trim/adjust applications.

The low power supply current and the small MSOP

package make the LTC1659 ideal for battery-powered

applications.

Functional Block Diagram: 12-Bit Rail-to-Rail DAC

■

Buffered True Rail-to-Rail Voltage Output

■

Maximum DNL Error: 0.5LSB

■

12-Bit Resolution

■

Supply Operation: 3V to 5V

■

Output Swings from 0V to V

REF

■

REF

Can Tie to V

■

Schmitt Trigger On Clock Input Allows Direct

Optocoupler Interface

■

Power-On Reset Clears DAC to 0V

■

3-Wire Cascadable Serial Interface

■

Low Cost

■

8-Lead SO and MSOP Packages

■

Digital Calibration

■

Industrial Process Control

■

Automatic Test Equipment

■

Cellular Telephones

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

–

12-BIT

DAC

2.7V TO 5.5V

GND

POWER-ON

RESET

OTHER

DACS

12-BIT

SHIFT

REG

AND

DAC

LATCH

μP

REF

OUT

1659 TA01

CLK1

CS/LD3

RAIL-TO-RAIL

VOLTAGE

OUTPUT

OUT

CODE

DNL ERROR (LSB)

0.5

–0.5

1024 2048 2560

1659 TA02

512 1536 3072 3584

4095

Differential Nonlinearity

vs Input Code

Summary of content (12 pages)

PAGE 1
LTC1659 12-Bit Rail-to-Rail Micropower DAC in MSOP Package FEATURES DESCRIPTION ■ The LTC®1659 is a single supply, rail-to-rail voltage output, 12-bit digital-to-analog converter (DAC) in an MSOP package. It includes a rail-to-rail output buffer ampliﬁer and an easy-to-use 3-wire cascadable serial interface. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Buffered True Rail-to-Rail Voltage Output Maximum DNL Error: 0.
PAGE 2
LTC1659 ABSOLUTE MAXIMUM RATINGS (Note 1) VCC to GND ............................................... –0.5V to 7.5V Logic Inputs to GND ................................. –0.5V to 7.5V VOUT .................................................–0.5V to VCC + 0.5V Maximum Junction Temperature .......................... 125°C Storage Temperature Range................... –65°C to 150°C Operating Temperature Range LTC1659CS8 ............................................ 0°C to 70°C LTC1659IS8 .......................
PAGE 3
LTC1659 ELECTRICAL CHARACTERISTICS The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = 2.7V to 5.5V, VOUT unloaded, REF ≤ VCC, TA = TMIN to TMAX unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Offset Error Measured at Code 20 VOS TC Offset Error Temperature Coefﬁcient VFS Full-Scale Voltage VFS TC Full-Scale Voltage Temperature Coefﬁcient MIN TYP ● MAX UNITS ±12 ±18 mV mV ±15 REF = 4.096V ● 4.
PAGE 4
LTC1659 ELECTRICAL CHARACTERISTICS The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = 2.7V to 5.5V, VOUT unloaded, REF ≤ VCC, TA = TMIN to TMAX unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switching (VCC = 4.5V to 5.
PAGE 5
LTC1659 TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity (INL) Minimum Output Voltage vs Output Sink Current Differential Nonlinearity (DNL) 0.5 5 1 OUTPUT PULL-DOWN VOLTAGE (V) 4 2 DNL ERROR (LSB) INL ERROR (LSB) 3 1 0 –1 –2 0 –3 –4 –5 0 512 1824 1536 2048 2560 3072 3584 4095 CODE 125°C –55°C 0.2 25°C 0.3 0.2 –55°C 0.1 5 10 OUTPUT SINK CURRENT (mA) 15 1659 • G03 Supply Current vs Temperature 300 290 SUPPLY CURRENT (μA) VCC – VOUT (V) 25°C 125°C 0.4 0 VCC = 5V 2 0.
PAGE 6
LTC1659 PIN FUNCTIONS CLK (Pin 1): Serial Interface Clock. Internal Schmitt trigger on this input allows direct optocoupler interface. DOUT (Pin 4): Output of the Shift Register which Becomes Valid on the Rising Edge of the Serial Clock. DIN (Pin 2): Serial Interface Data. Data on the DIN pin is latched into the shift register on the rising edge of the serial clock. GND (Pin 5): Ground. ⎯ ⎯S/LD (Pin 3): Serial Interface Enable and Load Control.
PAGE 7
LTC1659 TIMING DIAGRAM t1 t2 t6 CLK t4 t7 t3 t9 DIN B11 MSB B0 PREVIOUS WORD CS/LD DOUT B0 LSB B1 B10 t8 B11 PREVIOUS WORD B10 t5 B1 B0 B11 CURRENT WORD 1659 TD DEFINITIONS Differential Nonlinearity (DNL): The difference between the measured change and the ideal 1LSB change for any two adjacent codes. The DNL error between any two codes is calculated as follows: DNL = (ΔVOUT – LSB)/LSB where ΔVOUT is the measured voltage difference between two adjacent codes.
PAGE 8
LTC1659 OPERATION Serial Interface Voltage Output The data on the DIN input is loaded into the shift register on the rising edge of the clock. The MSB is loaded ﬁrst. The DAC register loads the data from the shift register when ⎯C⎯S/LD is pulled high. The CLK is disabled internally when ⎯C⎯S/LD is high. Note: CLK must be low before ⎯C⎯S/LD is pulled low to avoid an extra internal clock pulse.
PAGE 9
LTC1659 APPLICATIONS INFORMATION error (FSE) is positive, the output for the highest codes limits at VCC as shown is Figure 1c. No full-scale limiting can occur if VREF is less than VCC – FSE. Rail-to-Rail Output Considerations In any rail-to-rail DAC, the output swing is limited to voltages within the supply range. Offset and linearity are deﬁned and tested over the region of the DAC transfer function where no output limiting can occur.
PAGE 10
LTC1659 TYPICAL APPLICATION 12-Bit, 3V to 5V Single Supply, Rail-to-Rail Voltage Output DAC 2.7V TO 5.5V 0.1μF DIN VCC REF CLK μP LTC1659 OUTPUT 0V TO REF VOUT CS/LD DOUT GND TO NEXT DAC FOR DAISY-CHAINING 1659 TA03 PACKAGE DESCRIPTION S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 .245 MIN 7 6 5 .160 ±.005 .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) .030 ±.
PAGE 11
LTC1659 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.42 ± 0.038 (.0165 ± .0015) TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 1 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 2 3 4 1.10 (.043) MAX 0.86 (.
PAGE 12
LTC1659 TYPICAL APPLICATION Digitally Programmable Current Source 5V 0.1μF CLK μP DIN VCC VS + 6V TO 100V FOR RL ≤ 50Ω RL REF LTC1659 VOUT GND DIN • 5 ≈ 0mA TO 10mA 4096 • RA + LT®1077 CS/LD IOUT = Q1 2N3440 – RA 510Ω 5% 1659 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1257 Single 12-Bit VOUT DAC, Full Scale: 2.048V, VCC: 4.75V to 15.75V, Reference Can Be Overdriven Up to 12V, i.e.