Datasheet

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LTC1657/LTC1657L

Parallel 16-Bit Rail-to-Rail

Micropower DAC

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16-Bit Monotonic Over Temperature

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Deglitched Rail-to-Rail Voltage Output: 8nV•s

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: 650µA Typ

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Maximum DNL Error: ±1LSB

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Settling Time: 20µs to ±1LSB

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Built-In Reference: 2.048V (LTC1657)

1.25V (LTC1657L)

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Internal Power-On Reset to Zero Volts

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Asynchronous CLR Pin

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Output Buffer Configurable for Gain of 1 or 2

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Parallel 16-Bit or 2-Byte Double Buffered Interface

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Narrow 28-Lead SSOP Package

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Multiplying Capability

The LTC

1657/LTC1657L are complete single supply, rail-

to-rail voltage output, 16-bit digital-to-analog converters

(DAC) in a 28-pin SSOP or PDIP package. They include a

rail-to-rail output buffer amplifier, an internal reference

and a double buffered parallel digital interface.

The LTC1657/LTC1657L have separate reference input

pins that can be driven by an external reference. The full-

scale output can be 1 or 2 times the reference voltage

depending on how the X1/X2 pin is connected. The LTC1657

operates from a 4.5V to 5.5V supply and has an onboard

2.048V reference. The LTC1657L operates from a 2.7V to

5.5V supply and has an onboard 1.25V reference.

The LTC1657/LTC1657L are similar to Linear Technol-

ogy Corporation’s LTC1450/LTC1450L 12-bit V

OUT

DAC

family, allowing an upgrade path. They are the only

buffered 16-bit parallel DACs in a 28-lead SSOP package

and include an onboard reference for stand alone

performance.

, LTC and LT are registered trademarks of Linear Technology Corporation.

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Instrumentation

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Digital Calibration

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Industrial Process Control

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Automatic Test Equipment

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Communication Test Equipment

Differential Nonlinearity

vs Input Code

REFLOGND

LTC1657: 4.5V TO 5.5V

LTC1657L: 2.7V TO 5.5V

LTC1657:

0V TO 4.096V

LTC1657L:

0V TO 2.5V

16-BIT

DAC

REFHIREFOUT

22 2423

X1/X2

2120 26

1657 TA01

OUT

D15 (MSB)

DATA IN FROM

MICROPROCESSOR

DATA BUS

FROM

MICROPROCESSOR

DECODE LOGIC

FROM

SYSTEM RESET

D0 (LSB)

–

REFERENCE

LTC1657: 2.048V

LTC1657L: 1.25V

16-BIT

DAC

POWER-ON

RESET

LDAC

CLR

CSMSB

CSLSB

LSB

8-BIT

INPUT

MSB

8-BIT

INPUT

DESCRIPTIO

FEATURES

APPLICATIO S

BLOCK DIAGRA

DIGITAL INPUT CODE

0 16384 32768 49152 65535

DIFFERENTIAL NONLINEARITY (LSB)

1657 TA02

1.0

0.8

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

–1.0

Summary of content (16 pages)

PAGE 1
LTC1657/LTC1657L Parallel 16-Bit Rail-to-Rail Micropower DAC U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®1657/LTC1657L are complete single supply, railto-rail voltage output, 16-bit digital-to-analog converters (DAC) in a 28-pin SSOP or PDIP package. They include a rail-to-rail output buffer amplifier, an internal reference and a double buffered parallel digital interface.
PAGE 2
LTC1657/LTC1657L W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) VCC to GND .............................................. – 0.5V to 7.5V TTL Input Voltage, REFHI, REFLO, X1/X2 ....................................................... – 0.5V to 7.5V VOUT, REFOUT ............................ – 0.5V to (VCC + 0.5V) Operating Temperature Range LTC1657C/LTC1657LC .......................... 0°C to 70°C LTC1657I/LTC1657LI ......................
PAGE 3
LTC1657/LTC1657L ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V (LTC1657), VCC = 2.7V to 5.5V (LTC1657L), VOUT unloaded, REFOUT tied to REFHI, REFLO tied to GND, X1/X2 tied to GND, unless otherwise noted.
PAGE 4
LTC1657/LTC1657L ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range TA = TMIN to TMAX. VCC = 5V (LTC1657), VCC = 3V (LTC1657L), unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN LTC1657 TYP MAX MIN LTC1657L TYP MAX UNITS Digital I/O VIH Digital Input High Voltage VIL Digital Input Low Voltage ● 0.8 0.
PAGE 5
LTC1657/LTC1657L U W TYPICAL PERFOR A CE CHARACTERISTICS 2.0 5 1.6 1.6 4 1.2 0.8 0.4 0 –0.4 –0.8 –1.2 –1.6 INTEGRAL NONLINEARITY (LSB) 2.0 –2.0 1.2 0.8 0.4 0 –0.4 –0.8 –1.2 16384 32768 49152 DIGITAL INPUT CODE 65535 3 1.6 2 1.4 1 0 –1 0 2.0 0.4 –4 0.2 –5 0 65535 1.6 1.4 125°C 25°C 10 0 25°C 0.4 –55°C 15 1657 G07 10 1657 G06 LTC1657 Full-Scale Voltage vs Temperature 4.110 125°C 25°C –55°C 4.105 FULL-SCALE VOLTAGE (V) 0.
PAGE 6
LTC1657/LTC1657L U W TYPICAL PERFOR A CE CHARACTERISTICS LTC1657L Full-Scale Voltage vs Temperature LTC1657 Offset Error vs Temperature 2.500 1.0 1.0 0.9 0.8 0.8 0.6 0.7 0.4 OFFSET (mV) 2.505 OFFSET (mV) FULL-SCALE VOLTAGE (V) 2.510 0.6 0.5 0.4 0.3 2.495 2.490 –55 –25 5 35 65 TEMPERATURE (°C) 95 –0.6 – 0.8 –10 35 80 TEMPERATURE (°C) SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 5 4 3 2 700 VCC = 3V 1.8 680 1.6 660 1.4 1.2 1.0 0.8 0.6 1 0.4 0 0.2 5 600 VCC = 5V 580 VCC = 4.
PAGE 7
LTC1657/LTC1657L U W TYPICAL PERFOR A CE CHARACTERISTICS 1µV/DIV LTC1657L 0.1Hz to 10Hz Voltage Noise 1µV/DIV LTC1657 0.1Hz to 10Hz Voltage Noise 0 1 2 3 4 5 6 TIME (SEC) 7 8 9 10 0 1 2 3 4 5 6 TIME (SEC) 7 8 1659 G19 9 10 1659 G20 U U U PI FU CTIO S WR (Pin 1): Write Input (Active Low). Used with CSMSB and/or CSLSB to control the input registers. While WR and CSMSB and/or CSLSB are held low, data writes into the input register.
PAGE 8
LTC1657/LTC1657L U U U PI FU CTIO S CLR (Pin 27): Clear Input (Asynchronous Active Low). A low on this pin asynchronously resets all input and DAC registers to 0s. LDAC (Pin 28): Load DAC (Asynchronous Active Low). Used to asynchronously transfer the contents of the input registers to the DAC register which updates the output voltage. If held low, the DAC register loads data from the input registers which will immediately update VOUT.
PAGE 9
LTC1657/LTC1657L U U DEFI ITIO S Resolution (n): Resolution is defined as the number of digital input bits (n). It defines the number of DAC output states (2n) that divide the full-scale range. Resolution does not imply linearity. Full-Scale Voltage (VFS): This is the output of the DAC when all bits are set to 1. Voltage Offset Error (VOS): Normally, the DAC offset is the voltage at the output when the DAC is loaded with all zeros.
PAGE 10
LTC1657/LTC1657L U OPERATIO Parallel Interface The data on the input of the DAC is written into the DAC’s input registers when Chip Select (CSLSB and/or CSMSB) and WR are at a logic low. The data that is written into the input registers will depend on which of the Chip Selects are at a logic low (see Digital Interface Truth Table). If WR and CSLSB are both low and CSMSB is high, then only data on the eight LSBs (D0 to D7) is written into the input registers.
PAGE 11
LTC1657/LTC1657L U W U U APPLICATIO S I FOR ATIO Rail-to-Rail Output Considerations In any rail-to-rail DAC, the output swing is limited to voltages within the supply range. If the DAC offset is negative, the output for the lowest codes limits at 0V as shown in Figure 1b. Similarly, limiting can occur near full scale when the REF pin is tied to VCC /2. If VREF = VCC /2 and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC as shown in Figure 1c.
PAGE 12
LTC1657/LTC1657L U TYPICAL APPLICATIO S the onboard reference is always sourcing current and never has to sink any current even when VOUT is at full scale. The LT1077 output will have a wide bipolar output swing of – 4.096V to 4.096V as shown in the figure below. With this output swing, 1LSB = 125µV. This circuit shows how to make a bipolar output 16-bit DAC with a wide output swing using an LTC1657 and an LT1077.
PAGE 13
LTC1657/LTC1657L U TYPICAL APPLICATIO S This circuit shows a digitally programmable current source from an external voltage source using an external op amp, an LT1218 and an NPN transistor (2N3440). Any digital word from 0 to 65535 is loaded into the LTC1657 and its output correspondingly swings from 0V to 4.096V. This voltage will be forced across the resistor RA. If RA is chosen to be 412Ω, the output current will range from 0mA at zero scale to 10mA at full scale.
PAGE 14
LTC1657/LTC1657L U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. GN Package 28-Lead Plastic SSOP (Narrow 0.150) (LTC DWG # 05-08-1641) 0.386 – 0.393* (9.804 – 9.982) 28 27 26 25 24 23 22 21 20 19 18 17 1615 0.229 – 0.244 (5.817 – 6.198) 0.150 – 0.157** (3.810 – 3.988) 1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0.0075 – 0.0098 (0.191 – 0.249) 2 3 4 5 6 7 8 0.053 – 0.069 (1.351 – 1.748) 9 10 11 12 13 14 0.004 – 0.009 (0.102 – 0.249) 0° – 8° TYP 0.016 – 0.050 (0.
PAGE 15
LTC1657/LTC1657L U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N Package 28-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 1.370* (34.789) MAX 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.255 ± 0.015* (6.477 ± 0.381) 0.300 – 0.325 (7.620 – 8.255) 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) 0.020 (0.508) MIN 0.009 – 0.015 (0.229 – 0.381) ( +0.035 0.325 –0.015 8.255 +0.889 –0.381 ) 0.
PAGE 16
LTC1657/LTC1657L U TYPICAL APPLICATIO S This circuit shows how to measure negative offset. Since LTC1657/LTC1657L operate on a single supply, if their offset is negative, the output for code 0 limits at 0V. To measure this negative offset, a negative supply is needed, connect resistor R1 as shown in the figure. The output voltage is the offset when code 0 is loaded in. Negative Offset Measurement 5V 22 5:19 2 3 µP 1 28 27 23 24 0.