Datasheet

13
LTC1645
1645fa
voltage on the external capacitor C
TIMER
starts to ramp up
with a slope dv/dt = 2µA/C
TIMER
. When the voltage reaches
the trip point (1.23V), the timer is reset by pulling the
TIMER pin back to ground. The timer period is
t = (1.23V • C
TIMER
)/2µA. For a 200ms delay, use a 0.33µF
capacitor.
Electronic Circuit Breaker
The LTC1645 features an electronic circuit breaker func-
tion that protects against short circuits or excessive out-
put currents. By placing sense resistors between the
supply inputs and sense pins of the supplies, the circuit
breaker trips whenever the voltage across either sense
resistor is greater than 50mV for more than 1.5µs. If the
circuit breaker trips, both GATE pins are immediately
pulled to ground and the external N-channels FETs are
quickly turned off (time point 6 in Figure 12). The circuit
breaker resets and another timing cycle starts by taking
the ON pin below 0.4V and then high as shown at time
point 7.
At the end of the timer cycle (time point 8), the charge
pump turns on again. If the circuit breaker feature is not
required, short the SENSE n pin to V
CC n
.
If the 1.5µs response time is too fast to reject supply noise,
add external resistors and capacitors R
F
and C
F
to the
sense circuit as shown in Figure 13.
The ON Pin
The ON pin is used to control system operation as shown
in Figure 14. At time point 1, the board makes connection
and the supplies power up the chip. At time point 2, the ON
pin goes high and a timer cycle starts as long as both V
CC
pins are higher than the undervoltage lockout trip point
(2.23V for V
CC1
and 1.12V for V
CC2
) and an overcurrent
fault is not detected. At the end of the timer cycle (time
point 3), the charge pump is turned on and the GATE n pin
voltages start to ramp up with the output supply voltages,
V
OUT n
, following one gate-to-source voltage drop lower.
At time point 4, V
OUT2
reaches its power-good trip level
(this example assumes the FB pin resistive divider is
connected to V
OUT2
) and a timing cycle starts. At the end
of the timing cycle (time point 5), RESET goes high and the
power-up process is complete.
APPLICATIO S I FOR ATIO
WUUU
Figure 13. Extending the Short-Circuit Protection Delay
Figure 12. Current Fault Timing
Figure 14. ON Pin Waveforms
1645 F14
ON
0.8V
0.4V
0V
2V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
GATE1
GATE2
V
OUT1
V
OUT2
TIMER
V
CC n
RESET
RAMPING UP AND
DOWN TOGETHER
RAMPING UP AND
TURNING OFF FAST
RAMPING UP AND
DOWN SEPARATELY
SENSE n
LTC1645
GATE
n
V
CC n
1645 G13
C
F
R
F
RESET
V
OUT n
GATE n
1645 F12
TIMER
ON
V
CC n
– V
SENSE n
V
CC n
12 3 4
RAMPING UP
RESET FAULT
AND RAMP UP
CURRENT
FAULT
56 7 89 10