Datasheet

9
LTC1628/LTC1628-PG
1628fb
Figure 2
SWITCH
LOGIC
–
+
0.8V
4.8V
5V
V
IN
V
IN
4.5V
BINH
RUN/SS2
RUN/SS1
CLK2
CLK1
0.18µA
R6
R5
+
–
FCB
+
–
–
+
–
+
–
+
V
REF
MERGE LOGIC
INTERNAL
SUPPLY
3.3V
OUT
V
SEC
3V
FCB
FLTCPL
EXTV
CC
INTV
CC
SGND
STBYMD
+
5V
LDO
REG
SW
SHDN
0.55V
TOP
BOOST
TG
C
B
C
IN
D
1
D
B
PGND
BOT
BG
INTV
CC
INTV
CC
V
IN
+
C
SEC
C
OUT
V
OUT
1628 FD/F02
D
SEC
R
SENSE
R2
+
V
OSENSE
DROP
OUT
DET
RUN
SOFT
START
BOT
TOP ON
S
R
Q
Q
OSCILLATOR
FREQSET
FCB
EA
0.86V
0.80V
OV
V
FB
1.2µA
6V
R1
–
+
R
C
4(V
FB
)
RST
SHDN
RUN/SS
I
TH
C
C
C
C2
C
SS
1.19V
1M
+
4(V
FB
)
0.86V
SLOPE
COMP
3mV
+
–
–
+
SENSE
–
SENSE
+
INTV
CC
30k
45k
2.4V
45k
30k
I1 I2
B
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
+– –+
UU
U
PI FU CTIO S
FU CTIO AL DIAGRA
U
U
W
PGOOD: (LTC1628-PG Only) Open-Drain Logic Output.
PGOOD is pulled to ground when the voltage on either
V
OSENSE
pin is not within ±7.5% of its set point.
NC: These “No Connect” pins are not tied internally to
anything. On the PC layout, these pin landings should be
connected to the SGND plane under the IC.