Datasheet
27
LTC1628/LTC1628-PG
1628fb
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1628. These items are also illustrated graphically in
the layout diagram of Figure 10. The Figure 11 illustrates
the current waveforms present in the various branches of
the 2-phase synchronous regulators operating in the
continuous mode. Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M3 located
within 1cm of each other with a common drain connection
at C
IN
? Do not attempt to split the input decoupling for the
two channels as it can cause a large resonant loop.
2. Are the signal and power grounds kept separate? The
combined LTC1628 signal ground pin and the ground
return of C
INTVCC
must return to the combined C
OUT
(–)
terminals. The path formed by the top N-channel MOSFET,
Schottky diode and the C
IN
capacitor should have short
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible to the
(–) terminals of the input capacitor by placing the capaci-
tors next to each other and away from the Schottky loop
described above.
3. Do the LTC1628 V
OSENSE
pins resistive dividers con-
nect to the (+) terminals of C
OUT
? The resistive divider
must be connected between the (+) terminal of C
OUT
and
Figure 10. LTC1628 Recommended Printed Circuit Layout Diagram
C
B2
C
B1
FLTCPL
R
PU
PGOOD
V
PULL-UP
(<7V)
C
INTVCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
+
C
IN
D1
M1 M2
M3 M4
D2
+
C
VIN
V
IN
R
IN
INTV
CC
3.3V
R4R3
*PGOOD ON THE LTC1628-PG
R2
R1
RUN/SS1
SENSE1
+
SENSE1
–
V
OSENSE1
FREQSET
STBYMD
FCB
I
TH1
SGND
3.3V
OUT
I
TH2
V
OSENSE2
SENSE2
–
SENSE2
+
TG1
SW1
BOOST1
V
IN
BG1
EXTV
CC
INTV
CC
PGND
BG2
BOOST2
SW2
TG2
RUN/SS2
LTC1628
L1
L2
C
OUT1
V
OUT1
GND
V
OUT2
1628 F10
+
C
OUT2
+
R
SENSE
R
SENSE
FLTCPL
(PGOOD)*
APPLICATIO S I FOR ATIO
WUUU