Datasheet

19
LTC1628/LTC1628-PG
1628fb
Output Voltage
The LTC1628 output voltages are each set by an external
feedback resistive divider carefully placed across the
output capacitor. The resultant feedback signal is com-
pared with the internal precision 0.800V voltage reference
by the error amplifier. The output voltage is given by the
equation:
VV
R
R
OUT
=+






08 1
2
1
.
SENSE
+
/SENSE
–
Pins
The common mode input range of the current comparator
sense pins is from 0V to (1.1)INTV
CC
. Continuous linear
operation is guaranteed throughout this range allowing
output voltage setting from 0.8V to 7.7V, depending upon
the voltage applied to EXTV
CC
. A differential NPN input
stage is biased with internal resistors from an internal
2.4V source as shown in the Functional Diagram. This
requires that current either be sourced or sunk from the
SENSE pins depending on the output voltage. If the output
voltage is below 2.4V current will flow out of both SENSE
pins to the main output. The output can be easily preloaded
by the V
OUT
resistive divider to compensate for the current
comparator’s negative input bias current. The maximum
current flowing out of each pair of SENSE pins is:
I
SENSE
+
+ I
SENSE
–
= (2.4V – V
OUT
)/24k
Since V
OSENSE
is servoed to the 0.8V reference voltage, we
can choose R1 in Figure 2 to have a maximum value to
absorb this current.
Rk
V
VV
MAX
OUT
124
08
24
()
.
.–
=






for V
OUT
< 2.4V
Regulating an output voltage of 1.8V, the maximum value
of R1 should be 32K. Note that for an output voltage above
2.4V, R1 has no maximum value necessary to absorb the
sense currents; however, R1 is still bounded by the
V
OSENSE
feedback current.
Soft-Start/Run Function
The RUN/SS1 and RUN/SS2 pins are multipurpose pins
that provide a soft-start function and a means to shut
down the LTC1628. Soft-start reduces the input power
source’s surge currents by gradually increasing the
controller’s current limit (proportional to V
ITH
). This pin
can also be used for power supply sequencing.
An internal 1.2µA current source charges up the C
SS
capacitor
.
When the voltage on RUN/SS1 (RUN/SS2)
reaches 1.5V, the particular controller is permitted to start
operating. As the voltage on RUN/SS increases from 1.5V
to 3.0V, the internal current limit is increased from 25mV/
R
SENSE
to 75mV/R
SENSE
. The output current limit ramps
up slowly, taking an additional 1.25s/µF to reach full
current. The output current thus ramps up slowly, reduc-
ing the starting surge current required from the input
power supply. If RUN/SS has been pulled all the way to
ground there is a delay before starting of approximately:
t
V
A
CsFC
DELAY SS SS
=
µ
=µ
()
15
12
125
.
.
./
t
VV
A
CsFC
IRAMP SS SS
=
−
µ
=µ
()
315
12
125
.
.
./
By pulling both RUN/SS pins below 1V and/or pulling the
STBYMD pin below 0.2V, the LTC1628 is put into low
current shutdown (I
Q
= 20µA). The RUN/SS pins can be
driven directly from logic as shown in Figure 7. Diode D1
in Figure 7 reduces the start delay but allows C
SS
to ramp
up slowly providing the soft-start function. Each RUN/SS
pin has an internal 6V zener clamp (See Functional
Diagram).
Figure 7. RUN/SS Pin Interfacing
3.3V OR 5V RUN/SS
V
IN
INTV
CC
RUN/SS
D1
C
SS
R
SS
*
C
SS
R
SS
*
1628 F07
(a) (b)
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
APPLICATIO S I FOR ATIO
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