Datasheet

9
LTC1628-SYNC
1628syncfa
Figure 2
FU CTIO AL DIAGRA
U
U
W
(Refer to Functional Diagram)
OPERATIO
U
Main Control Loop
The LTC1628-SYNC uses a constant frequency, current
mode step-down architecture with the two controller
channels operating 180 degrees out of phase. During
normal operation, each top MOSFET is turned on when the
clock for that channel sets the RS latch, and turned off
when the main current comparator, I
1
, resets the RS latch.
The peak inductor current at which I
1
resets the RS latch
is controlled by the voltage on the I
TH
pin, which is the
output of each error amplifier EA. The V
OSENSE
pin receives
the voltage feedback signal, which is compared to the
internal reference voltage by the EA. When the load current
increases, it causes a slight decrease in V
OSENSE
relative to
the 0.8V reference, which in turn causes the I
TH
voltage to
SWITCH
LOGIC
–
+
0.8V
4.7V
5V
V
IN
V
IN
4.5V
BINH
CLK2
CLK1
0.18µA
R6
R5
+
–
FCB
+
–
–
+
–
+
–
+
V
REF
INTERNAL
SUPPLY
3.3V
OUT
V
SEC
R
LP
C
LP
3V
FCB
EXTV
CC
INTV
CC
SGND
+
5V
LDO
REG
SW
SHDN
0.55V
TOP
BOOST
TG
C
B
C
IN
D
1
D
B
PGND
BOT
BG
INTV
CC
INTV
CC
V
IN
+
C
SEC
C
OUT
V
OUT
1628 FD/F02
D
SEC
R
SENSE
R2
+
V
OSENSE
DROP
OUT
DET
RUN
SOFT
START
BOT
TOP ON
S
R
Q
Q
OSCILLATOR
PHASE DET
PLLFLTR
PLLIN
FCB
EA
0.86V
0.80V
OV
V
FB
1.2µA
6V
R1
–
+
R
C
4(V
FB
)
RST
SHDN
RUN/SS
I
TH
C
C
C
C2
C
SS
+
4(V
FB
)
0.86V
SLOPE
COMP
3mV
+
–
–
+
SENSE
–
SENSE
+
INTV
CC
30k
45k
2.4V
45k
30k
I1 I2
B
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
+– –+
50k
F
IN
+
–
+
–
+
–
+
–
PGOOD
V
OSENSE1
V
OSENSE2
0.86V
0.74V
0.86V
0.74V