Datasheet

3
LTC1628-SYNC
1628syncfa
The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 15V, V
RUN/SS1, 2
= 5V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
UVLO Undervoltage Lockout V
IN
Ramping Down 3.5 4 V
V
OVL
Feedback Overvoltage Lockout Measured at V
OSENSE1, 2
0.84 0.86 0.88 V
I
SENSE
Sense Pins Total Source Current (Each Channel); V
SENSE1
, 2
= V
SENSE1
+
, 2
+
= 0V 85 60 µA
DF
MAX
Maximum Duty Factor In Dropout 98 99.4 %
I
RUN/SS1, 2
Soft-Start Charge Current V
RUN/SS1, 2
= 1.9V 0.5 1.2 µA
V
RUN/SS1, 2
ON RUN/SS Pin ON Threshold V
RUN/SS1,
V
RUN/SS2
Rising 1.0 1.5 1.9 V
V
RUN/SS1, 2
LT RUN/SS Pin Latchoff Arming V
RUN/SS1,
V
RUN/SS2
Rising from 3V 4.1 4.5 V
Threshold
I
SCL1, 2
RUN/SS Discharge Current Soft Short Condition V
OSENSE1, 2
= 0.5V; 0.5 2 4 µA
V
RUN/SS1, 2
= 4.5V
I
SDLHO
Shutdown Latch Disable Current V
OSENSE1, 2
= 0.5V 1.6 5 µA
V
SENSE(MAX)
Maximum Current Sense Threshold V
OSENSE1, 2
= 0.7V,V
SENSE1
, 2
= 5V 65 75 85 mV
V
OSENSE1, 2
= 0.7V,V
SENSE1
, 2
= 5V 62 75 88 mV
TG Transition Time: (Note 5)
TG1, 2 t
r
Rise Time C
LOAD
= 3300pF 50 90 ns
TG1, 2 t
f
Fall Time C
LOAD
= 3300pF 50 90 ns
BG Transition Time: (Note 5)
BG1, 2 t
r
Rise Time C
LOAD
= 3300pF 40 90 ns
BG1, 2 t
f
Fall Time C
LOAD
= 3300pF 40 80 ns
TG/BG t
1D
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time C
LOAD
= 3300pF Each Driver 90 ns
BG/TG t
2D
Bottom Gate Off to Top Gate On Delay
Top Switch-On Delay Time C
LOAD
= 3300pF Each Driver 90 ns
t
ON(MIN)
Minimum On-Time Tested with a Square Wave (Note 6) 180 ns
INTV
CC
Linear Regulator
V
INTVCC
Internal V
CC
Voltage 6V < V
IN
< 30V, V
EXTVCC
= 4V 4.8 5.0 5.2 V
V
LDO
INT INTV
CC
Load Regulation I
CC
= 0 to 20mA, V
EXTVCC
= 4V 0.2 1.0 %
V
LDO
EXT EXTV
CC
Voltage Drop I
CC
= 20mA, V
EXTVCC
= 5V 80 160 mV
V
EXTVCC
EXTV
CC
Switchover Voltage I
CC
= 20mA, EXTV
CC
Ramping Positive 4.5 4.7 V
V
LDOHYS
EXTV
CC
Hysteresis 0.2 V
Oscillator and Phase-Locked Loop
f
NOM
Nominal Frequency V
PLLFLTR
= 1.2V 190 220 250 kHz
f
LOW
Lowest Frequency V
PLLFLTR
= 0V 120 140 160 kHz
f
HIGH
Highest Frequency V
PLLFLTR
2.4V 280 310 360 kHz
R
PLLIN
PLLIN Input Resistance 50 k
I
PLLFLTR
Phase Detector Output Current
Sinking Capability f
PLLIN
< f
OSC
–15 µA
Sourcing Capability f
PLLIN
> f
OSC
15 µA
3.3V Linear Regulator
V
3.3OUT
3.3V Regulator Output Voltage No Load 3.25 3.35 3.45 V
V
3.3IL
3.3V Regulator Load Regulation I
3.3
= 0 to 10mA 0.5 2 %
V
3.3VL
3.3V Regulator Line Regulation 6V < V
IN
< 30V 0.05 0.2 %
I
3.3LEAK
Leakage Current of 3.3V Regulator V
RUN/SS1, 2
= 0V, V
IN
= 30V 10 50 µA
in Shutdown