Datasheet

22
LTC1609
1609fa
0.1µF
OFFSET
TRIM
GAIN
TRIM
5V
LTC1662
CS/LD
SCK
SDI
REF
CS/LD
SCK
SDI
V
OUTA
GND
V
CC
V
OUTB
+
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
AGND2
2.2µF
+
2.2µF
200Ω
100Ω
787k
LTC1609
OFFSET/GAIN CIRCUITS FOR UNIPOLAR INPUT RANGES OFFSET/GAIN CIRCUITS FOR BIPOLAR INPUT RANGES
V
IN
+
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
AGND2
2.2µF
+
2.2µF
200Ω
100Ω
787k
LTC1609
V
IN
+
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
AGND2
2.2µF
+
2.2µF
200Ω
100Ω
787k
LTC1609
V
IN
0.1µF
OFFSET
TRIM
GAIN
TRIM
5V
LTC1662
CS/LD
SCK
SDI
REF
CS/LD
SCK
SDI
V
OUTA
GND
V
CC
V
OUTB
0.1µF
OFFSET
TRIM
GAIN
TRIM
5V
LTC1662
CS/LD
SCK
SDI
REF
CS/LD
SCK
SDI
V
OUTA
GND
V
CC
V
OUTB
0.1µF
OFFSET
TRIM
GAIN
TRIM
5V
LTC1662
CS/LD
SCK
SDI
REF
CS/LD
SCK
SDI
V
OUTA
GND
V
CC
V
OUTB
0.1µF
OFFSET
TRIM
GAIN
TRIM
5V
LTC1662
CS/LD
SCK
SDI
REF
CS/LD
SCK
SDI
V
OUTA
GND
V
CC
V
OUTB
+
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
AGND2
2.2µF
+
2.2µF
100Ω
33.2k
33.2k
787k
200Ω
LTC1609
V
IN
+
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
AGND2
2.2µF
+
2.2µF
200Ω
100Ω
787k
LTC1609
V
IN
+
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
AGND2
2.2µF
1609 F16
+
2.2µF
33.2k
100Ω
200Ω
787k
LTC1609
V
IN
33.2k
33.2k
0.1µF
OFFSET
TRIM
GAIN
TRIM
5V
LTC1662
CS/LD
SCK
SDI
REF
CS/LD
SCK
SDI
V
OUTA
GND
V
CC
V
OUTB
33.2k
0V TO 10V
0V TO 5V
0V TO 4V
±10V
±5V
±3.3V
APPLICATIO S I FOR ATIO
WUUU
Figure 16. Digitally-Controlled Offset and Full-Scale Adjust Circuits Using
the LTC1662 Dual 10-Bit V
OUT
DAC (Adjust Offset First at 0V, Then Adjust Gain)