Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SOIC 20

LTC1609

1609fa

LTC1609

AGND1

CAP

REF

AGND2

SB/BTC

EXT/INT

DGND

DIG

ANA

PWRD

BUSY

R/C

TAG

DATA

DATACLK

SYNC

33.2k

0.1µF

100Ω

ANALOG INPUT

–10V TO 10V

2.2µF

10µF

SERIAL INTERFACE

1609 TA01

200Ω

2.5V

The LTC

1609 is a 200ksps, serial sampling 16-bit A/D

converter that draws only 65mW (typical) from a single 5V

supply. This easy-to-use device includes a sample-and-

hold, a precision reference, a switched capacitor succes-

sive approximation A/D and trimmed internal clock.

The input range is specified for bipolar inputs of ±10V,

±5V and ±3.3V and unipolar inputs of 0V to 10V, 0V to 5V

and 0V to 4V. Maximum DC specs include ±2LSB INL and

16-bit no missing codes over temperature. It has a typical

signal-to-noise ratio of 87dB.

The ADC has a high speed serial interface. The serial

output data can be clocked out using either the internal

serial shift clock or be clocked out by an external shift

clock. A separate convert start input (R/C) and a data ready

signal (BUSY) ease connections to FIFOs, DSPs and

microprocessors.

16-Bit, 200ksps, Serial ADC

with Multiple Input Ranges

■

Sample Rate: 200ksps

■

Input Ranges

Unipolar: 0V to 10V, 0V to 5V and 0V to 4V

Bipolar: ±10V, ±5V and ±3.3V

■

Guaranteed No Missing Codes

■

Serial I/O

■

Single 5V Supply

■

Power Dissipation: 65mW Typ

■

Power Down Mode: 50µW

■

SNR: 87dB Typ

■

Operates with Internal or External Reference

■

28-Pin SSOP and 20-Pin SO Packages

■

Improved 2nd Source to ADS7809 and AD977A

■

Industrial Process Control

■

Multiplexed Data Acquisition Systems

■

High Speed Data Acquisition for PCs

■

Digital Signal Processing

200kHz, 16-Bit Serial Sampling ADC Configured for ±10V Inputs

, LTC and LT are registered trademarks of Linear Technology Corporation.

DESCRIPTIO

FEATURES

APPLICATIO S

TYPICAL APPLICATIO

FREQUENCY (kHz)

–60

–40

1609 G06

–80

–100

25 50 100

–120

–130

–20

MAGNITUDE (dB)

SAMPLE

= 200kHz

= 1kHz

SINAD = 87.2dB

THD = –100.1dB

Nonaveraged 4096 Point FFT Plot

Summary of content (24 pages)

PAGE 1
LTC1609 16-Bit, 200ksps, Serial ADC with Multiple Input Ranges U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC ®1609 is a 200ksps, serial sampling 16-bit A/D converter that draws only 65mW (typical) from a single 5V supply. This easy-to-use device includes a sample-andhold, a precision reference, a switched capacitor successive approximation A/D and trimmed internal clock. Sample Rate: 200ksps Input Ranges Unipolar: 0V to 10V, 0V to 5V and 0V to 4V Bipolar: ±10V, ±5V and ±3.
PAGE 2
LTC1609 U W W W ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) VANA .......................................................................... 7V VDIG to VANA ........................................................... 0.3V VDIG ........................................................................... 7V Ground Voltage Difference DGND, AGND1 and AGND2 .............................. ±0.3V Analog Inputs (Note 3) R1IN, R2IN, R3IN ................................................ ±25V CAP ........................
PAGE 3
LTC1609 U CONVERTER CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. With external reference (Notes 5, 6). PARAMETER CONDITIONS MIN LTC1609 TYP MAX MIN LTC1609A TYP MAX ±2 Bipolar Zero Error Drift Bipolar Ranges Unipolar Zero Error External Reference = 2.5V, Unipolar Ranges Unipolar Zero Error Drift Unipolar Ranges ±2 ±10 ● ±2 ±7 Full-Scale Error Drift Full-Scale Error External Reference = 2.
PAGE 4
LTC1609 U U DIGITAL I PUTS A D DIGITAL OUTPUTS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN VIH High Level Input Voltage VDD = 5.25V ● VIL Low Level Input Voltage VDD = 4.75V ● IIN Digital Input Current VIN = 0V to VDD ● CIN Digital Input Capacitance VOH High Level Output Voltage VDD = 4.75V IO = –10µA VOL Low Level Output Voltage VDD = 4.
PAGE 5
LTC1609 U W POWER REQUIREMENTS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN LTC1609/LTC1609A TYP MAX UNITS VDD Positive Supply Voltage (Notes 9, 10) 4.75 5.25 V IDD Positive Supply Current PWRD = Low PDIS Power Dissipation PWRD = Low PWRD = High Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
PAGE 6
LTC1609 U W TYPICAL PERFOR A CE CHARACTERISTICS Change in CAP Voltage vs Load Current Supply Current vs Supply Voltage 0.05 fSAMPLE = 200kHz 0 CHANGE IN CAP VOLTAGE (V) 14.5 14.0 13.5 13.0 12.5 12.0 11.5 0.03 0.02 0.01 0 –0.01 –0.02 –0.03 –0.04 11.0 4.5 5.0 4.75 5.25 SUPPLY VOLTAGE (V) –0.05 –14 –12 –10 –8 –6 –4 –2 0 LOAD CURRENT (mA) 5.5 Typical INL Curve –20 –30 –40 –50 –60 –70 4 1 1.5 1.5 –20 1.0 1.0 0.5 0.5 0 –0.5 –0.5 –1.0 –1.0 –1.5 –1.5 –2.0 –2.
PAGE 7
LTC1609 U U U PIN FUNCTIONS (20-Pin SO/28-Pin SSOP) R1IN (Pin 1/Pin 1): Analog Input. See Table 1 and Figure␣ 1 for input range connections. low, 16 clock pulses are output during each conversion. The pin will stay low between conversions. AGND1 (Pin 2/Pin 2): Analog Ground. Tie to analog ground plane. DATA (Pin 13/Pin 17): Serial Data Output. The output data is synchronized to the DATACLK and the format is determined by SB/BTC.
PAGE 8
LTC1609 W FUNCTIONAL BLOCK DIAGRA U U R1IN R2IN CSAMPLE 20k 10k 20k VANA CSAMPLE 5k R3IN REF VDIG ZEROING SWITCHES 4k 2.5V REF + REF BUF COMP 16-BIT CAPACITIVE DAC – CAP (2.
PAGE 9
LTC1609 U W U U APPLICATIO S I FOR ATIO the end of a conversion, the DAC output balances the VIN input charge. The SAR contents (a 16-bit data word) that represents the VIN are loaded into the 16-bit output shift register. Driving the Analog Inputs The LTC1609 analog input ranges, along with the nominal input impedances, are shown in Tables 1a and 1b. The inputs are overvoltage protected to ±25V. The input impedance can get as low as 10kΩ, therefore, it should be driven with a low impedance source.
PAGE 10
LTC1609 U W U U APPLICATIO S I FOR ATIO INPUT RANGE WITH TRIM (ADJUST OFFSET FIRST AT 0V, THEN ADJUST GAIN) WITHOUT TRIM LTC1609 LTC1609 R1IN R1IN 200Ω 200Ω AGND1 AGND1 100Ω 100Ω VIN 0V TO 10V R2IN R2IN OFFSET 50k TRIM R3IN 33.2k 33.2k VIN 5V + R3IN 2.2µF CAP + + CAP 5V 576k GAIN 50k TRIM REF 2.2µF 2.2µF + AGND2 AGND2 LTC1609 LTC1609 R1IN R1IN 200Ω 200Ω AGND1 AGND1 100Ω 100Ω 5V R2IN 0V TO 5V REF 2.2µF VIN 33.2k 33.
PAGE 11
LTC1609 U W U U APPLICATIO S I FOR ATIO INPUT RANGE WITH TRIM (ADJUST OFFSET FIRST AT 0V, THEN ADJUST GAIN) WITHOUT TRIM 200Ω VIN LTC1609 200Ω R1IN VIN AGND1 AGND1 R2IN ± 10V R2IN 100Ω 100Ω R3IN 33.2k CAP + + R3IN + 33.2k 2.2µF 5V OFFSET 50k TRIM REF CAP 5V 576k GAIN 50k TRIM + 2.2µF 2.2µF AGND2 LTC1609 LTC1609 R1IN R1IN 200Ω 200Ω AGND1 AGND1 33.2k 100Ω VIN R2IN OFFSET 50k TRIM + R2IN + R3IN 2.2µF CAP + 100Ω VIN 5V R3IN 33.
PAGE 12
LTC1609 U W U U APPLICATIO S I FOR ATIO Table 1c. LTC1609 Output Codes for Ideal Input Voltages DESCRIPTION ANALOG INPUT Full-Scale Range ±10V ±5V ±3.34 0V to 10V 0V to 5V 0V to 4V Least Significant Bit 305µV 153µV 102µV 153µV 76µV 61µV +Full Scale (FS – 1LSB) 9.999695V 4.999847V Midscale 1LSB Below Midscale 0V 0V 0V – 305µV –153µV –102µV –10V – 5V – 3.340000V 9.999847V 4.999924V 3.999939V 5V 2.5V 2V 4.999847V 2.499924V 1.
PAGE 13
LTC1609 U W U U APPLICATIO S I FOR ATIO Dynamic Performance FFT (Fast Fourier Transform) test techniques are used to test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using an FFT algorithm, the ADC’s spectral content can be examined for frequencies outside the fundamental. Figure 6 shows a typical LTC1609 FFT plot which yields a SINAD of 87.2dB and THD of – 100dB.
PAGE 14
LTC1609 U W U U APPLICATIO S I FOR ATIO Power Shutdown the sample-and-hold into the hold mode bring CS and R/C low for no less than 40ns. Once initiated it cannot be restarted until the conversion is complete. Converter status is indicated by the BUSY output and this is low while the conversion is in progress. When the PWRD pin is tied high, power consumption drops to a typical value of 50µW from a specified maximum of 100mW.
PAGE 15
LTC1609 U W U U APPLICATIO S I FOR ATIO External Clock Mode pulse on the SYNC pin will be generated on the rising edge of DATACLK #0. The SYNC output can be captured on the falling edge of DATACLK #0 or on the rising edge of DATACLK #1. After the rising edge of DATACLK #1, the SYNC output will go low and the MSB will be clocked out on the DATA pin. This bit can be latched on the falling edge of DATACLK #1 or on the rising edge of DATACLK #2.
PAGE 16
LTC1609 U W U U APPLICATIO S I FOR ATIO External Data Clock Data Read After the Conversion Using the highest frequency permitted for DATACLK (20MHz), shifting the data out after the conversion will not degrade the 200kHz throughput. Figure 10 shows how the result from the current conversion can be read out after the conversion has been completed. The externally supplied data clock is running continuously.
PAGE 17
LTC1609 U W U U APPLICATIO S I FOR ATIO t12 t13 t14 0 1 2 15 16 EXTERNAL DATACLK t15 t1 R/C t2 BUSY t3 t21 t22 t17 SYNC t18 DATA B15 (MSB) B14 B1 B0 1606 F11 Figure 11. Conversion and Read Timing Using a Discontinuous Data Clock (EXT/INT Tied High, CS Tied Low). Read Previous Conversion Result During the Conversion. For Best Performance, Complete Read in Less Than 1.
PAGE 18
LTC1609 U W U U APPLICATIO S I FOR ATIO t12 0 t14 t13 1 2 3 4 16 17 18 t19 EXTERNAL DATACLK CS t16 t15 R/C t2 t3 BUSY t17 SYNC t12 DATA t23 TAG TAG0 t18 B15 (MSB) t24 TAG1 B14 B13 B1 B0 TAG0 TAG1 TAG2 TAG3 TAG15 TAG16 TAG17 TAG18 TAG19 1606 F12 Figure 12. Conversion and Read Timing Using an External Data Clock (EXT/INT Tied High). Read Previous Conversion Result During the Conversion. For Best Performance, Complete Read in Less Than 1.
PAGE 19
LTC1609 U W U U APPLICATIO S I FOR ATIO R/C BUSY 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 DCLK ••• DATA OUT B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 DEVICE DATA #1 B5 B4 B3 B2 B1 B0 NULL BIT B15 B14 B13 B12 B11 DEVICE DATA #2 B10 • • • 1609 F14 Figure 14. Data Output from Cascading Two (CS = Low, TAG (#2) = Low) LTC1609s Together Output Data Format The SB/BTC pin controls the format of the serial digital output word.
PAGE 20
LTC1609 U W U U APPLICATIO S I FOR ATIO C6 2.2µF E14 GND C4 1000pF C2 1000pF C5 2.2µF C3 1000pF E8 5V E15 R4 E16 R5 E17 R6 C1 10µF R4 200Ω 1 2 R5 100Ω R6 33k 3 4 E1 R3IN 5 6 7 8 9 10 11 5V 12 JP1 13 14 JP2 R1IN VDIG AGND1 VANA R2IN PWRD R3IN BUSY NC LTC1609 CS CAP NC REF NC NC R/C AGND2 NC NC TAG NC NC SB/BTC DATA EXT/INT DATACLK DGND SYNC 28 C7 0.
PAGE 21
LTC1609 U W U U APPLICATIO S I FOR ATIO Figure 15b. LTC1609 “Postage Stamp” Evaluation Board Silkscreen (2× Actual Size) Figure 15c. LTC1609 “Postage Stamp” Evaluation Board Top Metal Layer (2× Actual Size) Figure 15d.
PAGE 22
LTC1609 U W U U APPLICATIO S I FOR ATIO LTC1609 200Ω R1IN LTC1609 R1IN VIN 200Ω AGND1 33.2k 0V TO 10V 100Ω VIN AGND1 ±10V R2IN R2IN 100Ω LTC1662 CS/LD SCK SDI 5V CS/LD VOUTA GND SCK VCC SDI VOUTB REF OFFSET TRIM R3IN CAP GAIN TRIM 787k + + REF LTC1662 CS/LD SCK SDI 5V CS/LD VOUTA GND SCK VCC SDI VOUTB REF 33.2k OFFSET TRIM CAP GAIN TRIM 787k + 2.2µF 2.2µF R3IN + 2.2µF 2.2µF AGND2 0.1µF AGND2 0.
PAGE 23
LTC1609 U PACKAGE DESCRIPTIO G Package 28-Lead Plastic SSOP (5.3mm) (Reference LTC DWG # 05-08-1640) 10.07 – 10.33* (.397 – .407) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 7.65 – 7.90 (.301 – .311) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 5.20 – 5.38** (.205 – .212) 1.73 – 1.99 (.068 – .078) 0° – 8° .13 – .22 (.005 – .009) .55 – .95 (.022 – .037) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) .65 (.0256) BSC .25 – .38 (.010 – .015) .05 – .21 (.002 – .
PAGE 24
LTC1609 U PACKAGE DESCRIPTIO SW Package 20-Lead Plastic Small Outline (Wide .300 Inch) (Reference LTC DWG # 05-08-1620) 0.496 – 0.512* (12.598 – 13.005) 20 19 18 17 16 15 14 13 12 11 0.394 – 0.419 (10.007 – 10.643) NOTE 1 0.291 – 0.299** (7.391 – 7.595) 2 1 3 4 5 6 7 8 9 10 0.037 – 0.045 (0.940 – 1.143) 0.093 – 0.104 (2.362 – 2.642) 0.010 – 0.029 × 45° (0.254 – 0.737) 0° – 8° TYP 0.009 – 0.013 (0.229 – 0.330) NOTE 1 0.016 – 0.050 (0.406 – 1.270) 0.050 (1.270) BSC 0.004 – 0.