Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 36

LTC1608

High Speed, 16-Bit, 500ksps

Sampling A/D Converter

with Shutdown

The LTC

1608 is a 500ksps, 16-bit sampling A/D con-

verter that draws only 270mW from ±5V supplies. This

high performance device includes a high dynamic range

sample-and-hold, a precision reference and a high speed

parallel output. Two digitally selectable power shutdown

modes provide power savings for low power systems.

The LTC1608’s full-scale input range is ±2.5V. Outstand-

ing AC performance includes 90dB S/(N+D) and –100dB

THD at a sample rate of 500ksps.

The unique differential input sample-and-hold can acquire

single-ended or differential input signals up to its 15MHz

bandwidth. The 68dB common mode rejection allows

users to eliminate ground loops and common mode noise

by measuring signals differentially from the source.

The ADC has µP compatible,16-bit parallel output port.

There is no pipeline delay in conversion results. A separate

convert start input and a data ready signal (BUSY) ease

connections to FlFOs, DSPs and microprocessors.

■

A Complete, 500ksps 16-Bit ADC

■

90dB S/(N+D) and –100dB THD (Typ)

■

Power Dissipation: 270mW (Typ)

■

No Pipeline Delay

■

No Missing Codes Over Temperature

■

Nap (7mW) and Sleep (10

W) Shutdown Modes

■

Operates with Internal 15ppm/°C Reference

or External Reference

■

True Differential Inputs Reject Common Mode Noise

■

5MHz Full Power Bandwidth

■

±2.5V Bipolar Input Range

■

36-Pin SSOP Package

■

Pin Compatible with the LTC1604

, LTC and LT are registered trademarks of Linear Technology Corporation.

■

Telecommunications

■

Digital Signal Processing

■

Multiplexed Data Acquisition Systems

■

High Speed Data Acquisition

■

Spectrum Analysis

■

Imaging Systems

FREQUENCY (kHz)

–40

–20

150 200

1608 TA02

–60

–80

50 100 250

–100

–120

–140

AMPLITUDE (dB)

SAMPLE

= 500kHz

= 98.754kHz

SINAD = 86.7dB

THD = –92.6dB

LTC1608 4096 Point FFT

Circuitry in the LTC1608 is covered under US Patent #5,764,175

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

2.2µF

10µF

10Ω

22µF

DIFFERENTIAL

ANALOG INPUT

±2.5V

REFCOMP

CONTROL

LOGIC

AND

TIMING

B15 TO B0

16-BIT

SAMPLING

ADC

–

10µF

5V OR

µP

CONTROL

LINES

D15 TO D0

OUTPUT

BUFFERS

16-BIT

PARALLEL

BUS

11 TO 26

1608 TA01

OGND

–

SHDN

CONVST

BUSY

7.5k

LTC1608

DGND

REF

AGND

–5V

10µF

2.5V

REF

10µF

1.75X

+ +

Summary of content (20 pages)

PAGE 1
LTC1608 High Speed, 16-Bit, 500ksps Sampling A/D Converter with Shutdown U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO A Complete, 500ksps 16-Bit ADC 90dB S/(N+D) and –100dB THD (Typ) Power Dissipation: 270mW (Typ) No Pipeline Delay No Missing Codes Over Temperature Nap (7mW) and Sleep (10µW) Shutdown Modes Operates with Internal 15ppm/°C Reference or External Reference True Differential Inputs Reject Common Mode Noise 5MHz Full Power Bandwidth ±2.
PAGE 2
LTC1608 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO AVDD = DVDD = OVDD = VDD (Notes 1, 2) ORDER PART NUMBER TOP VIEW Supply Voltage (VDD) ................................................ 6V Negative Supply Voltage (VSS) ............................... – 6V Total Supply Voltage (VDD to VSS) .......................... 12V Analog Input Voltage (Note 3) ......................... (VSS – 0.3V) to (VDD + 0.3V) VREF Voltage (Note 4) ................. – 0.3V to (VDD + 0.
PAGE 3
LTC1608 W U DY A IC ACCURACY TA = 25°C (Note 5) SYMBOL PARAMETER CONDITIONS MIN S/N Signal-to-Noise Ratio 5kHz Input Signal 100kHz Input Signal 90 88 dB dB S/(N + D) Signal-to-(Noise + Distortion) Ratio 5kHz Input Signal 100kHz Input Signal (Note 10) 90 84 dB dB THD Total Harmonic Distortion Up to 5th Harmonic 5kHz Input Signal 100kHz Input Signal – 100 – 91 dB dB SFDR Spurious Free Dynamic Range 100kHz Input Signal 94 dB IMD Intermodulation Distortion fIN1 = 29.
PAGE 4
LTC1608 U W POWER REQUIRE E TS The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS VDD Positive Supply Voltage (Notes 12, 13) VSS Negative Supply Voltage (Note 12) IDD Positive Supply Current Nap Mode Sleep Mode CS = RD = 0V CS = 0V, SHDN = 0V CS = 5V, SHDN = 0V ● 22 1.5 1 35 2.
PAGE 5
LTC1608 ELECTRICAL CHARACTERISTICS Note 4: When these pin voltages are taken below VSS, they will be clamped by internal diodes. This product can handle input currents greater than 100mA below VSS without latchup. These pins are not clamped to VDD. Note 5: VDD = 5V, VSS = – 5V, fSMPL = 500kHz, and t r = t f = 5ns unless otherwise specified. Note 6: Linearity, offset and full-scale specification apply for a singleended AIN+ input with AIN– grounded.
PAGE 6
LTC1608 U W TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Feedthrough vs Ripple Frequency fSAMPLE = 500kHz fIN1 = 96.56kHz fIN2 = 99.
PAGE 7
LTC1608 W FU CTIO AL BLOCK DIAGRA U 10µF U 2.2µF 10Ω + 3 VREF 5V 10µF + 36 AVDD 5V 35 9 AVDD 10µF + 10 DVDD DGND SHDN 33 4 REFCOMP + 7.5k 1.75X 4.375V CS 32 CONTROL LOGIC AND TIMING 2.5V REF µP CONTROL LINES CONVST 31 RD 30 BUSY 27 22µF OVDD 29 + 1 AIN+ DIFFERENTIAL ANALOG INPUT ±2.
PAGE 8
LTC1608 U W U U APPLICATIO S I FOR ATIO 3V Input/Output Compatible CSMPL AIN+ SAMPLE The LTC1608 operates on ±5V supplies, which makes the device easy to interface to 5V digital systems. This device can also talk to 3V digital systems: the digital input pins (SHDN, CS, CONVST and RD) of the LTC1608 recognize 3V or 5V inputs.
PAGE 9
LTC1608 U W U U APPLICATIO S I FOR ATIO (e.g., CONVST low time >tCONV), accuracy is unaffected. For best results, keep t 5 less than 500ns or greater than tCONV. CS t2 CONVST Figures 5 through 9 show several different modes of operation. In modes 1a and 1b (Figures 5 and 6), CS and RD are both tied low. The falling edge of CONVST starts the conversion. The data outputs are always enabled and data can be latched with the BUSY rising edge. Mode 1a shows operation with a narrow logic low CONVST pulse.
PAGE 10
LTC1608 U W U U APPLICATIO S I FOR ATIO t CONV CS = RD = 0 t5 CONVST t6 t8 BUSY t7 DATA DATA (N + 1) D15 TO D0 DATA N D15 TO D0 DATA (N – 1) D15 TO D0 1608 F05 Figure 5. Mode 1a. CONVST Starts a Conversion. Data Outputs Always Enabled (CONVST = ) tCONV CS = RD = 0 t8 t5 t13 CONVST t6 t6 BUSY t7 DATA (N – 1) D15 TO D0 DATA DATA N D15 TO D0 DATA (N + 1) D15 TO D0 1608 F06 Figure 6. Mode 1b. CONVST Starts a Conversion.
PAGE 11
LTC1608 U W U U APPLICATIO S I FOR ATIO t8 t CONV CS = 0 RD = CONVST t6 t 11 BUSY t 10 t7 DATA (N – 1) D15 TO D0 DATA DATA N D15 TO D0 DATA N D15 TO D0 DATA (N + 1) D15 TO D0 1608 F08 Figure 8. Mode 2. Slow Memory Mode Timing t CONV CS = 0 t8 RD = CONVST t6 t 11 BUSY t 10 DATA DATA N D15 TO D0 DATA (N – 1) D15 TO D0 1608 F09 Figure 9. ROM Mode Timing Choosing an Input Amplifier Choosing an input amplifier is easy if a few requirements are taken into consideration.
PAGE 12
LTC1608 U W U U APPLICATIO S I FOR ATIO The best choice for an op amp to drive the LTC1608 will depend on the application. Generally applications fall into two categories: AC applications where dynamic specifications are most critical and time domain applications where DC accuracy and settling time are most critical. The following list is a summary of the op amps that are suitable for driving the LTC1608.
PAGE 13
LTC1608 U W U U APPLICATIO S I FOR ATIO 2.500V 4.375V R1 7.5k 3 VREF BANDGAP REFERENCE 1 ANALOG INPUT 2V TO 2.7V DIFFERENTIAL AIN+ 2 AIN– 2V TO 2.7V 3 LTC1608 4 REFCOMP REFERENCE AMP LTC1450 R2 12k 22µF 5 AGND 4 VREF REFCOMP 22µF R3 16k 5 AGND LTC1608 1608 F13 1608 F12a Figure 13. Driving VREF with a DAC Figure 12a. LTC1608 Reference Circuit Differential Inputs ANALOG INPUT VIN LT1019A-2.5 VOUT 1 AIN+ 2 AIN– 3 VREF LTC1608 4 + 22µF 0.
PAGE 14
LTC1608 U W U U APPLICATIO S I FOR ATIO Differential inputs allow greater flexibility for accepting different input ranges. Figure 14b shows a circuit that converts a 0V to 5V analog input signal with only an additional buffer that is not in the signal path. ±2.5V 0V TO 5V + AIN+ 2 AIN– 3 011...110 OUTPUT CODE ANALOG INPUT 1 011...111 VREF 000...001 000...000 111...111 111...110 100...001 100...
PAGE 15
LTC1608 U W U U APPLICATIO S I FOR ATIO EXAMPLE LAYOUT applications where the ADC data outputs and control signals are connected to a continuously active microprocessor bus, it is possible to get errors in the conversion results. These errors are due to feedthrough from the microprocessor to the successive approximation comparator. The problem can be eliminated by forcing the microprocessor into a WAIT state during conversion or by using three-state buffers to isolate the ADC data bus.
PAGE 16
LTC1608 U W U U APPLICATIO S I FOR ATIO E5 3V + + C13 22µF E3 VREF C11 2.2µF 1 AIN+ 2 AIN– 3 C10 22µF 4 5 6 7 C9 5V 1µF 8 9 E4 GND E2 –5V OVDD 10 11 12 13 14 15 16 17 18 + E1 5V R6 JP1 10Ω C28 22µF C8 0.
PAGE 17
LTC1608 U W U U APPLICATIO S I FOR ATIO Figure 17b. Suggested Evaluation Circuit Board. Component Side Silkscreen and Signal Traces ANALOG GROUND PLANE DIGITAL GROUND PLANE Figure 17d. Suggested Evaluation Circuit Board. Inner Layer 1 Showing Separate Analog and Digital Ground Planes 2500 COUNT ANALOG GROUND PLANE DIGITAL GROUND PLANE Figure 17e. Suggested Evaluation Circuit Board. Inner Layer 2 Showing Separate Analog and Digital Ground Planes noise at the rated throughput.
PAGE 18
LTC1608 U W U U APPLICATIO S I FOR ATIO 0 fSAMPLE = 500kHz fIN = 2.807kHz SINAD = 88.9dB THD = –98dB EFFECTIVE BITS –40 –60 –80 –100 –120 98 15 92 14 86 13 80 12 74 11 68 10 62 9 56 8 –140 0 50 100 150 200 250 1k FREQUENCY (kHz) 10k 100k FREQUENCY (Hz) SINAD (dB) AMPLITUDE (dB) –20 16 50 1M 1608 F20 1608 F19a Figure 19a.
PAGE 19
LTC1608 U W U U AMPLITUDE (dB BELOW THE FUNDAMENTAL) APPLICATIO S I FOR ATIO (fa ± fb). If the two input sine waves are equal in magnitude, the value (in decibels) of the 2nd order IMD products can be expressed by the following formula: 0 –10 –20 –30 –40 ( –50 –70 –80 THD 3RD 2ND –90 –100 –110 1k 10k 100k INPUT FREQUENCY (Hz) Amplitude at (fa ± fb) Amplitude at fa Peak Harmonic or Spurious Noise 1M 1608 F21 Figure 21.
PAGE 20
LTC1608 U TYPICAL APPLICATIO Using the LTC1608 and Two LTC1391s as an 8-Channel Differential 16-Bit ADC System 5V 1 2 3 4 5 6 7 CH7 + 8 CH0 V+ CH1 D V CH2 DOUT CH4 DIN CH5 CS CH6 CLK CH7 GND 16 VREF 2 3 4 5 6 7 CH7 – 8 V+ CH1 D CH2 V– CH3 DOUT CH4 DIN CH5 CS CH6 CLK CH7 GND AVDD 10 9 DVDD AVDD DGND SHDN 33 –5V LTC1608 1µF + 13 4 REFCOMP 12 + 4.375V 22µF 11 7.5k 1.75X CONTROL LOGIC AND TIMING 2.