Datasheet

17
LTC1605-1/LTC1605-2
* Retrieve the MUX address from memory *
* and send it to the LTC1391 *
*****************************************
*
LDAA MUX Retrieve the MUX address from memory
ORAA #$08 Enable the selected MUX address
STAA SPDR Select the MUX channel
WAIT1 LDAA SPSR This loop waits for the SPI to complete a serial
* transfer/exchange by reading the SPI Status Register
BPL WAIT1 The SPIF (SPI transfer complete flag) bit is the SPSR’s
* MSB and is set to one at the end of an SPI transfer. The
* branch will occur while SPIF is a zero.
BCLR PORTD,Y %00100000 This forces a logic low on PORTD’s SS*,
* latching the MUXes data
*
*****************************************
* Initiate a LTC1605 conversion *
*****************************************
*
BCLR PORTA,Y %00010000 Initiate a conversion
BSET PORTA,Y %00010000 This sets the LTC1605’s R/C* to a logic
* high
*
*****************************************
* Set the LTC1605’s BYTE input low to *
* ensure that the high byte is present *
* during the first read *
*****************************************
*
LDAA PORTA Get the contents of Port A
ANDA #%11110111 Set Bit3 low
STAA PORTA Set the LTC1605’s BYTE input low
*
*****************************************
* The next short loop ensures that the *
* LTC1605’s conversion is finished *
* before starting the data transfer*
*****************************************
*
CONVENDLDAA PORTA Retrieve the contents of port A
ANDA #%00000001 Look at Bit0
* Bit0 = Lo; the LTC1605’s conversion is not
* complete
* Bit0 = Hi; the LTC1605’s conversion is complete
BEQ CONVEND Branch to the loop’s beginning while Bit7
* remains low
*
TYPICAL APPLICATIO S
U