Datasheet

LTC1595/LTC1596/LTC1596-1
8
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Table 1. LTC1596/LTC1596-1 Input Register
CONTROL INPUTS
STB1 STB2 STB3 STB4 INPUT REGISTER AND SRO OPERATION
0 1 0
Serial Data Bit on SRI Loaded Into Input
Register, MSB First
Data Bit or SRI Appears on SRO Pin After
16 Clocked Bits
0 1 0
0 0 0
0 0 1
1 X X X
No Input Register Operation
No SRO Operation
X 1 X X
X X 0 X
X X X 1
TruTh Tables
Table 2. LTC1596/LTC1596-1 DAC Register
CONTROL INPUTS
CLR LD1 LD2 DAC Register Operation
0 X X Reset DAC Register and Input Register to
All 0s (LTC1596) or to Mid-Scale (LTC1596-1)
(Asynchronous Operation)
1 1 X No DAC Register Operation
1 X 1
1 0 0 Load DAC Register with the Contents of Input
Register
block DiagraM
(LTC1595)
112k
7k
112k
56k
112k
56k
112k56k56k56k
DECODER
D15
(MSB)
D13
D14 D12 D11 D0
(LSB)
CLK
IN
LOAD
V
DD
V
REF
R
FB
OUT1
GND
SRI
6
1595 BD
DAC REGISTER
56k56k56k56k
INPUT 16-BIT SHIFT REGISTER
5
8
1
LD
7
CLK
4
3
2
• ••
TiMing DiagraM
(LTC1595)
SRI
LD
PREVIOUS
WORD
D15
MSB
D14
D1
1595 TD
D0
LSB
t
DS
t
DH
t
CH
t
SRI
t
ASB
t
CL
t
LD
CLK INPUT