Datasheet
3
LTC1569-6
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
S
= 3V (V
+
= 3V, V
–
= 0V), f
CLK
= 4.096MHz, f
CUTOFF
= 64kHz, R
LOAD
= 10k unless otherwise specified.
E
LECTR
IC
AL C CHARA TERIST
ICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Output DC Offset R
EXT
= 10k, Pin 5 Shorted to Pin 7 V
S
= 3V ±2 ±5mV
(Note 2) V
S
= 5V ±6 ±12 mV
V
S
= ±5V ±15 mV
Output DC Offset R
EXT
= 10k, Pin 5 Shorted to Pin 7 V
S
= 3V 25 µV/°C
Drift V
S
= 5V 25 µV/°C
V
S
= ±5V 75 µV/°C
Clock Pin Logic Thresholds V
S
= 3V Min Logical “1” 2.7 V
when Clocked Externally Max Logical “0” 0.5 V
V
S
= 5V Min Logical “1” 4.0 V
Max Logical “0” 0.5 V
V
S
= ±5V Min Logical “1” 4.0 V
Max Logical “0” 0.5 V
Power Supply Current f
CLK
= 256kHz (40k from Pin 6 to Pin 7, V
S
= 3V 3 4 mA
(Note 3) Pin 5 Open, ÷ 4), f
CUTOFF
= 4kHz ● 5mA
V
S
= 5V 3.5 5 mA
● 6mA
V
S
= 10V 4.5 7 mA
● 8mA
f
CLK
= 4.096MHz (10k from Pin 6 to Pin 7, V
S
= 3V 8 mA
Pin 5 Shorted to Pin 4, ÷ 1), f
CUTOFF
= 64kHz ● 11 mA
V
S
= 5V 9 mA
● 13 mA
V
S
= 10V 12 mA
● 17 mA
Clock Feedthrough Pin 5 Open 0.1 mV
RMS
Wideband Noise Noise BW = DC to 2 • f
CUTOFF
95 µV
RMS
THD f
IN
= 3kHz, 1.5V
P-P
, f
CUTOFF
= 32kHz 80 dB
Clock-to-Cutoff 64
Frequency Ratio
Max Clock Frequency V
S
= 3V 5 MHz
(Note 4) V
S
= 5V 5 MHz
V
S
= ±5V 7 MHz
Min Clock Frequency V
S
= 3V, 5V, T
A
< 85°C 1.5 kHz
(Note 5) V
S
= ±5V 3kHz
Input Frequency Range Aliased Components <–65dB 0.9 • f
CLK
Hz
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: DC offset is measured with respect to Pin 3.
Note 3: If the internal oscillator is used as the clock source and the divide-
by-4 or divide-by-16 mode is enabled, the supply current is reduced as
much as 40% relative to the divide-by-1 mode.
Note 4: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5: The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6: For more details refer to the Input and Output Voltage Range
paragraph in the Applications Information section.