Datasheet
13
LTC1546
V.35 Interface
A typical V.35 balanced interface is shown in Figure 26. A
V.35 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.35
interface requires a T or delta network termination at the
receiver end and the generator end. The receiver differen-
tial impedance measured at the connector must be
100Ω␣ ±10Ω, and the impedance between shorted termi-
nals (A' and B') and ground (C') must be 150Ω ±15Ω.
In V.35 mode, both switches S1 and S2 inside the LTC1546
are on, connecting a T network impedance as shown in
Figure 27. The 30k input impedance of the receiver is
placed in parallel with the T network termination, but does
not affect the overall input impedance significantly.
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground (C) must be 150Ω ±15Ω.
No-Cable Mode
The no-cable mode (M0 = M1 = M2 = 1) is intended for
the case when the cable is disconnected from the con-
nector. The charge pump, bias circuitry, drivers and
receivers are turned off, the driver outputs are forced into
a high impedance state, and the supply current drops to
less than 200µA. Note that the LTC1546’s R2 and R3
receivers continue to be terminated by a 103Ω differen-
tial impedance.
Charge Pump
The LTC1546 uses an internal capacitive charge pump to
generate V
DD
and V
EE
as shown in Figure 28. A voltage
doubler generates about 8V on V
DD
and a voltage inverter
generates about –7.5V on V
EE
. Four 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The V
EE
capacitor C5 should be a minimum of
3.3µF. All capacitors are 16V and should be placed as close
as possible to the LTC1546 to reduce EMI.
Figure 28. Charge Pump
Figure 27. V.35 Receiver Configuration
Figure 26. Typical V.35 Interface
A
A
'
B
C
B
'
C
'
GENERATOR
BALANCED
INTERCONNECTING
CABLE
LOAD
CABLE
TERMINATION
RECEIVER
1546 F26
50Ω
125Ω
50Ω
50Ω
125Ω
50Ω
R3
124Ω
R5
20k
LTC1546
RECEIVER
1546 F27
A
'
B
'
C
'
R1
51.5Ω
R8
6k
S2
S3
R2
51.5Ω
R6
10k
R7
10k
GND
R4
20k
S1
28
27
26
25
1546 F28
3
2
1
4
C3
1µF
C4
1µF
5V
C1
1µF
C2
1µF
C5
3.3µF
LTC1546
V
DD
C1
+
C1
–
V
CC
C2
+
C2
–
V
EE
GND
+
Receiver Fail-Safe
All LTC1546/LTC1544 receivers feature fail-safe opera-
tion in all modes. If the receiver inputs are left floating or
are shorted together by a termination resistor, the receiver
output will always be forced to a logic high.
DTE vs DCE Operation
The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1546, and Driver 3/Receiver 1 and Driver 4/
Receiver 4 in the LTC1544. The INVERT pin in the LTC1544
allows the Driver 4/Receiver 4 enable to be high or low true
polarity.
APPLICATIO S I FOR ATIO
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