Datasheet

12
LTC1450/LTC1450L
TYPICAL APPLICATIONS N
U
Bipolar Output 12-Bit DAC
LTC1450
V
OUT
V
DAC
V
REF
DATA (0:11)
CSLSB
CSMSB
WR
LDAC
CLR
V
CC
REFOUT
GND
REFHI
R3
20k
R6
20k
I
OUT

–2.048mA TO 2.047mA
(1µA/LSB)
I
OUT
=
Z
OUT
=
R1 = R3
R2 = R4 + R5
• 4.096 – V
REF
REFLO
X1/X2
D
IN

FROM µP
DATA BUS
FROM µP AND
DECODE LOGIC
FROM 
SYSTEM RESET
V
CC
0.1µF
LTC1450/50L • TA06
–
+
R4
21.5k
15V
–15V
LT1097
2
3
7
4
6
R1
20k
R2
22.6k
R5
1.13k
(R1)(R5)(R3 + R4)
(R2)(R3) – R1(R4 + R5)
D
IN

4096
R2
(R1)(R5)
()
2.047mA
–2.048mA
40952048
I
OUT
D
IN
Digitally Programmable Bilateral Current Source/Sink
LTC1450 V
OUT
V
DAC
*REFLO IS TIED TO REFOUT AND 
REFHI IS TIED TO GND
TYING REFLO TO REFOUT AND REFHI TO GND IN THIS
APPLICATION OVERCOMES THE NEED FOR A PULL-DOWN
RESISTOR ON THE REFOUT PIN. REFOUT SEES A CONSTANT
LOAD TO GND INDEPENDENT OF V
OUT
V
REF
DATA (0:11)
CSLSB
CSMSB
WR
LDAC
CLR
V
CC
REFOUT
GND
REFLO*
10k
10k
V
OUT

–2.048V TO 2.047V
(1mV/LSB)
V
OUT
= 2.048 +
4.096
REFHI*
X1/X2
D
IN

FROM µP
DATA BUS
FROM µP AND
DECODE LOGIC
FROM 
SYSTEM RESET
5V
0.1µF
LTC1450/50L • TA05
–
+
10k
D
IN
– 4096
4096
5V
–5V
LT
®
1097
3
2
7
4
6
10k
()
2.047V
–2.048V
40952048
V
OUT
D
IN