Datasheet
14
LTC1433/LTC1434
APPLICATIONS INFORMATION
WUU
U
C
IN
will require an RMS current rating of at least 0.2A at
temperature and C
OUT
will require an ESR of less than
0.25Ω. In most of the applications, the requirements for
these capacitors are fairly similar.
Figure 14 shows the complete circuit along with its effi-
ciency curve.
Latchup Prevention (Figure 15)
In applications where the input supply can momentarily
dip below the output voltage, it is recommended that a
Schottky diode (D2) be connected from V
OUT
to V
IN
. This
diode will prevent the output capacitor from forward
biasing the parasitic diode of the internal monolithic power
MOSFET, preventing a large amount of current from
flowing into the substrate to create a potential latchup
condition.
Figure 14. Design Example Circuit and its Efficiency Curve
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SSW
NC
BSW
NC
SGND
RUN/SS
LBO
LBI
PWRV
IN
SV
IN
C
OSC
POR
I
TH
V
OSENSE
V
PROG
LTC1433
PGND
100µF*
10V
0.1µF
0.1µF
100µF*
10V
D1:MBRS130LT3
L1: SUMIDA CD54-220
*AVX TPSD107M010R0100
V
OUT
5V
400mA
D1
L1
22µH
POWER-ON
RESET
V
IN
6V
680pF
5.1k
10k
6800pF
50pF
LOAD CURRENT (A)
0.001
60
EFFICIENCY (%)
70
80
0.01 0.1 1
1433/34 F14
50
40
100
90
V
IN
= 6V
V
OUT
= 5V
C
OSC
= 50pF
L = 22µH
+
+
LTC1434
+
D1
D2
C
OUT
SW
V
OUT
V
IN
L
1433/34 F15
Figure 15