Datasheet

10
LTC1421/LTC1421-2.5
APPLICATIONS INFORMATION
WUU
U
A 5.1k resistor is tied from the FB pin to V
OUTLO
, setting the
internal threshold to about 2.9V. The new reset threshold
voltage is set by the external resistive divider connected to
COMP2. When V
OUTLO
drops below the new threshold,
COMPOUT pulls FB to ground, changing the internal
threshold at COMP1 to 5.88V and generating a reset.
Finally, the comparator may be used to monitor a negative
supply as shown in Figure 8e. The external resistor divider
Figure 8c shows how the comparator can be used to
generate a reset when the 12V supply (V
OUTHI
) drops
below 10.8V. The 5V supply (V
OUTLO
) also generates a
reset when it dips below 4.65V. When the 12V supply
drops below 10.8V, COMPOUT will pull the FB pin low
setting the internal threshold voltage for comparator 1 to
5.88V. Since V
OUTLO
is less than 5.88V, PWRGD immedi-
ately goes low and a reset is generated 32µs later.
Figure 8d shows how the comparator can be used to
override the internal reset voltage for a 5V supply on
V
OUTLO
.
–
+
–
+
V
CCLO
V
CCLO
1421 F08c
1.232V
LTC1421
20µA
20µA
8
14
13
15
11
16
20
26.7k
COMP1
COMP2
RESET
TIMING
73.5k
107k
1%
13.7k
1%
6
7
71.5k
5V 12V
Figure 8c. Reset 12V at 10.8V, Reset 5V at 4.65V Figure 8e. Monitor –12V at –10.8V, Reset 5V at 4.65V
–
+
–
+
V
CCLO
V
CCLO
1421 F08e
1.232V
LTC1421
20µA
20µA
8
14
13
15
11
16
20
26.7k
COMP1
COMP2
RESET
TIMING
73.5k
107k
1%
10k
5%
13.7k
1%
6
7
71.5k
5V
12V
–12V
Figure 8d. Reset 5V at 4.5V
–
+
–
+
V
CCLO
V
CCLO
1421 F08d
1.232V
LTC1421
20µA
20µA
8
14
13
15
11
16
20
26.7k
COMP1
COMP2
RESET
TIMING
73.5k
102k
1%
5.1k
5%
38.3k
1%
6
7
71.5k
5V
12V
–
+
–
+
V
CCLO
V
CCLO
1421 F08b
1.232V
LTC1421
20µA
20µA
8
14
13
15
11
16
20
26.7k
COMP1
COMP2
RESET
TIMING
73.5k
10k
5%
107k
1%
38.3k
1%
6
7
71.5k
3.3V 5V
Figure 8b. Monitor 5V, Reset 3.3V at 2.9V