Datasheet

7
LTC1420
1420fa
CLK
1420 TD
ANALOG
INPUT
DATA
OUTPUT
t
CONV
t
CLOCK
t
H
t
L
N – 3
N
N + 1
N + 2
N + 3
N – 2 N – 1 N
t
ACQ
DIGITAL CORRECTION
LOGIC
OUTPUT
BUFFERS
1420 BD
MODE SELECT
PIPELINED 12-BIT ADCS/H
0V OR –5V
V
CM
GAIN
5V
V
DD
(PIN 7)
V
DD
(PIN 23) OV
DD
OGND
OPTIONAL 3V
LOGIC SUPPLY
OF
D11 (MSB)
D0 (LSB)
CLK
SENSE
V
REF
–A
IN
+
A
IN
GND
(PIN 24)
GND
(PIN 8)
V
SS
GND
(PIN 6)
2.048V
2.5V
REFERENCE
PIN FUNCTIONS
UU
U
FUNCTIONAL BLOCK DIAGRA
UU
W
TI I G DIAGRA
UWW
V
DD
(Pin 23): Analog 5V Supply. Bypass to GND with a 1µF
ceramic.
GND (Pin 24): Analog Power Ground.
V
SS
(Pin 25): Negative Supply. Can be –5V or 0V. If V
SS
is
not shorted to GND, bypass to GND with a 1µF ceramic.
CLK (Pin 26): Conversion Start Signal. This active high
signal starts a conversion on its rising edge.
OF (Pin 27): Overflow Output. This signal is high when the
digital output is 011111111111 or 100000000000.
GAIN (Pin 28): Gain Select for Input PGA. 5V selects an
input gain of 1, 0V selects a gain of 2.