Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 28

LTC1420

1420fa

12-Bit, 10Msps,

Sampling ADC

The LTC

1420 is a 10Msps, 12-bit sampling A/D converter

that draws only 250mW from either single 5V or dual ±5V

supplies. This easy-to-use device includes a high dynamic

range sample-and-hold, a precision reference and a PGA

input circuit.

The LTC1420 has a flexible input circuit that allows full-

scale input ranges of ±2.048V ±1.024V and ±0.512V. The

input common mode voltage is arbitrary, though a 2.5V

reference is provided for single supply applications. The

input PGA has a digitally selectable 1x or 2x gain.

Maximum DC specs include ±1LSB INL and ±1LSB DNL

over temperature. Outstanding AC performance includes

71dB S/(N + D) and 83dB SFDR at the Nyquist input

frequency of 5MHz.

The unique differential input sample-and-hold can acquire

single-ended or differential input signals up to its 100MHz

bandwidth. The 75dB common mode rejection allows

users to eliminate ground loops and common mode noise

by measuring signals differentially from the source. A

separate output logic supply allows direct connection to

3V components.

■

10Msps Sample Rate

■

Single 5V Supply or

5V Supplies

■

71dB S/(N + D) and 83dB SFDR at Nyquist

■

100MHz Full-Power Bandwidth Sampling

■

Input PGA

■

Integral Nonlinearity Error <0.35LSB

■

Differential Nonlinearity <0.25LSB

■

±2.048V, ±1.024V and ±0.512V Bipolar Input Range

■

Out-of-Range Indicator

■

True Differential Inputs with 75dB CMRR

■

Power Dissipation: 250mW

■

28-Pin Narrow SSOP Package

■

Telecommunications

■

Digital Signal Processing

■

Multiplexed Data Acquisition Systems

■

High Speed Data Acquisition

■

Spectral Analysis

■

Imaging Systems

Typical INL Curve

CODE

0 1024 2048 3072 4096

INL (LSBs)

1420 TA02

1.00

0.75

0.50

0.25

–0.25

–0.50

–0.75

–1.00

DIGITAL CORRECTION

LOGIC

OUTPUT

BUFFERS

1420 TA01

MODE SELECT

PIPELINED 12-BIT ADCS/H

0V OR –5V

GAIN

28 7 23 22

OPTIONAL 3V

LOGIC SUPPLY

D11 (MSB)

D0 (LSB)

CLK

10MHz CLK

DIGITAL

OUTPUT

SENSE

REF

–A

–

24825 6

OGNDGNDGNDV

GND

2.048V

2.5V

REFERENCE

1µF

5V5V

1µF 1µF

1µF

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

, LTC and LT are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Summary of content (20 pages)

PAGE 1
LTC1420 12-Bit, 10Msps, Sampling ADC U FEATURES DESCRIPTIO ■ The LTC®1420 is a 10Msps, 12-bit sampling A/D converter that draws only 250mW from either single 5V or dual ±5V supplies. This easy-to-use device includes a high dynamic range sample-and-hold, a precision reference and a PGA input circuit. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 10Msps Sample Rate Single 5V Supply or ±5V Supplies 71dB S/(N + D) and 83dB SFDR at Nyquist 100MHz Full-Power Bandwidth Sampling Input PGA Integral Nonlinearity Error <0.
PAGE 2
LTC1420 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO 0VDD = VDD (Notes 1, 2) TOP VIEW Supply Voltage (VDD) ................................................. 6V Negative Supply Voltage (VSS) ................................ – 6V Total Supply Voltage (VDD to VSS) ........................... 12V Analog Input Voltage (Note 3) ............................. (VSS – 0.3V) to (VDD + 0.3V) Digital Input Voltage (Note 4) ............................. (VSS – 0.3V) to (VDD + 0.
PAGE 3
LTC1420 W U DY A IC ACCURACY The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = – 5V, fSAMPLE = 10MHz, VREF = 4.096V. + AIN = – 0.1dBFS single ended input, – AIN = 0V. (Note 6) SYMBOL PARAMETER CONDITIONS MIN TYP 68.5 68 71.4 71.
PAGE 4
LTC1420 U W POWER REQUIRE E TS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5) SYMBOL PARAMETER CONDITIONS MIN VDD Positive Supply Voltage (Note 10) OVDD Output Supply Voltage (Note 10) VSS Negative Supply Voltage Dual Supply Mode Single Supply Mode TYP MAX UNITS 4.75 5.25 V 2.7 5.25 V – 4.75 V V – 5.
PAGE 5
LTC1420 U W TYPICAL PERFOR A CE CHARACTERISTICS S/(N+D) vs Input Frequency and Amplitude Spurious-Free Dynamic Range vs Input Amplitude 100 75 dBFS VIN = 0dB DUAL SUPPLIES ±2.048V RANGE GAIN = 1× 60 55 60 DUAL SUPPLIES ±2.048V RANGE GAIN = 1× fIN = 5MHz 50 VIN = –20dB 50 0.1 dBc 70 10 1 INPUT FREQUENCY (MHz) 40 –50 100 S/(N+D) vs Input Frequency and Amplitude SINGLE SUPPLY ±1.024V RANGE GAIN = 2× VIN = –6dB 65 60 –60 80 dBc 70 60 SINGLE SUPPLY ±1.
PAGE 6
LTC1420 U W TYPICAL PERFOR A CE CHARACTERISTICS IDD vs Clock Frequency ISS vs Clock Frequency 52 1.4 50 1.2 1.0 VREF = 4.096V ISS (mA) IDD (mA) 48 46 VREF = 2.048V 0.8 0.6 44 0.4 42 0.2 40 0 2 4 6 8 CLOCK FREQUENCY (MHz) 0 10 0 2 4 6 8 CLOCK FREQUENCY (MHz) 1420 G10 1420 G11 CMRR vs Input Frequency LTC1420 Nonaveraged 4096 Point FFT 0 90 80 fSAMPLE = 10Msps fIN = 5.048828125MHz SFDR = 83.
PAGE 7
LTC1420 U U U PIN FUNCTIONS VDD (Pin 23): Analog 5V Supply. Bypass to GND with a 1µF ceramic. CLK (Pin 26): Conversion Start Signal. This active high signal starts a conversion on its rising edge. GND (Pin 24): Analog Power Ground. OF (Pin 27): Overflow Output. This signal is high when the digital output is 011111111111 or 100000000000. VSS (Pin 25): Negative Supply. Can be – 5V or 0V. If VSS is not shorted to GND, bypass to GND with a 1µF ceramic. GAIN (Pin 28): Gain Select for Input PGA.
PAGE 8
LTC1420 U W U U APPLICATIONS INFORMATION Conversion Details Analog Input Ranges The LTC1420 is a high performance 12-bit A/D converter that operates up to 10Msps. It is a complete solution with an on-chip sample-and-hold, a 12-bit pipelined CMOS ADC, a low drift programmable reference and an input programmable gain amplifier. The digital output is parallel, with a 12-bit two’s complement output and an out-ofrange (overflow) bit.
PAGE 9
LTC1420 U W U U APPLICATIONS INFORMATION VREF and VREF can be driven by an external voltage. With two additional resistors, VREF can be set to any voltage between 2.048V and 4.5V. An external reference or a DAC can be used to drive VREF over a 0V to 5V range (Figures 3a and 3b). The input impedance of the VREF pin is 1k, so a buffer may be required for high accuracy. Driving VREF with a DAC is useful in applications where the peak input signal amplitude may vary.
PAGE 10
LTC1420 U U W U APPLICATIONS INFORMATION Table 2. Comparison of Analog Input Configurations SUPPLIES COUPLING VREF GAIN AIN + AIN – COMMENTS ±5V DC 4.096V 1× ±2.048 0 5V DC 4.096V 2× 2.5 ± 1.024 2.5 Best SNR, THD 5V DC 2.048V 1× 2.5 ± 1.024 2.5 Worse Noise than Above Case 5V DC 4.096V 1× 2.5 ± 2.048 2.5 Best Single Supply Noise, THD Is Not Optimal 5V DC 4.096V 1× 0 to 4.096 2.048 Same As Above ±5V AC (Transformer) 4.096V 1× ±1.024 ±1.
PAGE 11
LTC1420 U W U U APPLICATIONS INFORMATION Differential Operation The THD and SFDR performance of the LTC1420 can be improved by using a center tap RF transformer to drive the inputs differentially. Though the signal can no longer be DC coupled, the improvement in dynamic performance makes this an attractive solution for some applications. Typical connections for single and dual supply systems are shown in Figures 8a and 8b.
PAGE 12
LTC1420 U W U U APPLICATIONS INFORMATION Digital Outputs and Overflow Bit (OF) Figure 10 shows the ideal input/output characteristics for the LTC1420. The output data is two’s complement binary for all input ranges and for both single and dual supply operation. One LSB = VREF/4096. To create a straight binary output, invert the MSB (D11). The overflow bit (OF) indicates when the analog input is outside the input range of the converter.
PAGE 13
LTC1420 U U W U APPLICATIONS INFORMATION connected to this ground plane. All bypass capacitors for the LTC1420 should also be connected to this ground plane (Figure 12). The digital system ground should be connected to the analog ground plane at only one point, near the OGND pin. are present.
PAGE 14
5 4 3 2 J2 (J6) BNC (SMB) 5 4 3 2 J1 (J5) BNC (SMB) 1 –AIN 1 +AIN 1 2 2 R16 51Ω OPT R15 51Ω OPT JP4 JP5 JP6 1 1 1 GAIN 2 2 2 26 28 2 24 25 1 1 1µF 2 C5 23 22 21 20 1 AGND 1 1µF 2 C4 1 1µF 27 2 C12 19 18 17 16 1 VDD 1 VSS 1 OVDD D1 MBR0520LT1 E7 E6 E5 E4 E3 E2 1 OGND 15 +AIN GAIN 1 R19 0Ω 2 R18 1 20Ω 2 C6 470pF U1, LTC1420 VCM –AIN CLK SENSE VSS OF GND VREF VDD VDD GND GND OVDD OGND D10 D11 (MSB) D1 D8 D9 D3 D2 D0 D6 D7 D5 D4 1 2 3
PAGE 15
LTC1420 U W U U APPLICATIONS INFORMATION Figure 15. Top Silkscreen Layer for LTC1420 Demo Board Figure 16.
PAGE 16
LTC1420 U W U U APPLICATIONS INFORMATION Figure 17. Ground Plane Layer for LTC1420 Demo Board Figure 18.
PAGE 17
LTC1420 U W U U APPLICATIONS INFORMATION Figure 19.
PAGE 18
LTC1420 U TYPICAL APPLICATIONS Single Supply, 10Msps, 12-Bit ADC with 3V Logic Outputs LTC1420 30Ω ANALOG INPUT (2.5V ±1.
PAGE 19
LTC1420 U PACKAGE DESCRIPTION GN Package 28-Lead Plastic SSOP (Narrow 0.150) (LTC DWG # 05-08-1641) .386 – .393* (9.804 – 9.982) .045 ±.005 28 27 26 25 24 23 22 21 20 19 18 17 1615 .254 MIN .033 (0.838) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC 1 RECOMMENDED SOLDER PAD LAYOUT .015 ± .004 × 45° (0.38 ± 0.10) .0075 – .0098 (0.19 – 0.25) 2 3 4 5 6 7 8 9 10 11 12 13 14 .0532 – .0688 (1.35 – 1.75) .004 – .0098 (0.102 – 0.
PAGE 20
LTC1420 U TYPICAL APPLICATION Single 3.3V Supply, 10Msps, 12-Bit ADC LTC1420 ANALOG INPUT (2.048VP-P) + – 15Ω 15Ω 1 470pF, NPO 2 3 1µF 4 5 1.4MHz BOOST REGULATOR 1µF 4.7µH 3.3V 5V + 0.1µF 7 + 15µF 0.1µF 100k 15µF VIN SHDN 6 1µF 8 SW LT1613 SHDN GND 9 FB 10 32.4k 11 12 13 14 +AIN GAIN –AIN OF VCM SENSE CLK VSS VREF GND GND VDD VDD OVDD GND OGND D11 D0 D10 D1 D9 D2 D8 D3 D7 D4 D6 D5 28 27 26 OVERFLOW BIT 10MHz CLOCK 25 24 5V 23 TO PIN 7 1µF 22 21 3.