Datasheet

8
LTC1417
sn1417 1417fas
Load Circuits for Access Timing Load Circuits for Output Float Delay
CONVST (Pin 13): Conversion Start Signal. This active
low signal starts a conversion on its falling edge.
BUSY (Pin 14): The BUSY output shows the converter
status. It is low when a conversion is in progress.
V
SS
(Pin 15): Negative Supply, –5V for Bipolar Operation.
Bypass to AGND using 10µF tantalum in parallel with
0.1µF ceramic. Analog ground for unipolar operation.
V
DD
(Pin 16): 5V Positive Supply. Bypass to AGND with
10µF tantalum in parallel with 0.1µF ceramic.
PIN FUNCTIONS
UUU
TEST CIRCUITS
FUNCTIONAL BLOCK DIAGRA
UU
W
1k C
L
D
OUT
DGND
A) HI-Z TO V
OH
AND V
OL
TO V
OH
C
L
D
OUT
1k
5V
B) HI-Z TO V
OL
AND V
OH
TO V
OL
DGND
1417 TC01
1k
30pF
D
OUT
A) V
OH
TO HI-Z
30pF
D
OUT
1k
5V
B) V
OL
TO HI-Z
1417 TC02
14-BIT CAPACITIVE DAC
COMPREF AMP
2.5V REF
8k
REFCOMP
(4.096V)
C
SAMPLE
C
SAMPLE
D
OUT
BUSY
CONTROL LOGIC
CONVST RD CLKOUTSHDN
INTERNAL
CLOCK
EXTCLKIN
MUX
ZEROING SWITCHES
SCLK
V
DD
16
15
9
7
1481213116
10
5
4
3
2
1
A
IN
+
A
IN
–
V
REF
AGND
DGND
14
1417 BD
+
–
SUCCESSIVE APPROXIMATION
REGISTER
V
SS
(0V FOR UNIPOLAR MODE
–5V FOR BIPOLAR MODE)
SHIFT REGISTER