Datasheet

7
LTC1415
12-BIT CAPACITIVE DAC
COMPREF AMP
2.5V REF
REFCOMP
(4.096V)
C
SAMPLE
C
SAMPLE
•
•
•
D11
OV
DD
OGND
D0
BUSY
CONTROL LOGIC
CSCONVST RDSHDN
INTERNAL
CLOCK
NAP/SLP
ZEROING SWITCHES
DV
DD
AV
DD
+A
IN
–A
IN
V
REF
AGND
DGND
12
1415 BD
+
–
SUCCESSIVE APPROXIMATION
REGISTER
OUTPUT LATCHES
2k
FU CTIO AL BLOCK DIAGRA
UU W
Load Circuits for Access Timing
Load Circuits for Bus Relinquish Time
1k 100pF 100pF
DBN
(A) V
OH
TO Hi-Z (B) V
OL
TO Hi-Z
DBN
1k
5V
1415 TC02
1k C
L
C
L
DBN
(A) Hi-Z TO V
OH
AND V
OL
TO V
OH
(B) Hi-Z TO V
OL
AND V
OH
TO V
OL
DBN
1k
5V
1415 TC01
TEST CIRCUITS