Datasheet

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LTC1409

12-Bit, 800ksps Sampling

A/D Converter with Shutdown

ESCRIPTIO

The LTC

1409 is a 1µs, 800ksps, sampling 12-bit A/D

converter that draws only 80mW from ±5V supplies. This

easy-to-use device includes a high dynamic range sample-

and-hold and a precision reference. Two digitally selectable

power Shutdown modes provide flexibility for low power

systems.

The LTC1409 full-scale input range is ±2.5V. Maximum

DC specs include ±1LSB INL and ±1LSB DNL over tem-

perature. Outstanding AC performance includes 72.5dB

S/(N + D) at the Nyquist input frequency of 400kHz.

The unique differential input sample-and-hold can acquire

single-ended or differential input signals up to its 20MHz

bandwidth. The 60dB common mode rejection allows

users to eliminate ground loops and common mode noise

by measuring signals differentially from the source.

The ADC has a µP compatible, 12-bit parallel output port.

There is no pipeline delay in the conversion results.

A separate convert start input and a data ready signal

(BUSY) ease connections to FIFOs, DSPs and micropro-

cessors. A digital output driver power supply pin allows

direct connection to 3V logic.

■

Sample Rate: 800ksps

■

Power Dissipation: 80mW

■

72.5dB S/(N + D) and 86dB THD at Nyquist

■

No Pipeline Delay

■

Nap (4mW) and Sleep (10µW) Shutdown Modes

■

Operates with Internal 15ppm/°C Reference

or External Reference

■

True Differential Inputs Reject Common Mode Noise

■

20MHz Full Power Bandwidth Sampling

■

±2.5V Bipolar Input Range

■

28-Pin SO Wide and SSOP Package

■

Telecommunications

■

Digital Signal Processing

■

Multiplexed Data Acquisition Systems

■

High Speed Data Acquisition

■

Spectrum Analysis

■

Imaging Systems

, LTC and LT are registered trademarks of Linear Technology Corporation.

ITY

800kHz, 12-Bit Sampling A/D Converter

Effective Bits and Signal-to-(Noise + Distortion)

vs Input Frequency

1

2

3

4

5

6

7

8

9

10

11

12

13

28

27

26

25

24

23

22

21

20

19

18

17

16

15



–A



REF



REFCOMP

AGND

D11(MSB)

D10

D9

D8

D7

D6

D5

D4

DGND



BUSY

CS

CONVST

RD

SHDN

NAP/SLP

OGND

D0

D1

D2

LTC1409

10µF

DIFFERENTIAL

ANALOG INPUT

(–2.5V TO 2.5V)

2.50V

REF

OUTPUT

10µF

–5V

12-BIT

PARALLEL

BUS

µP CONTROL

LINES

LTC1409 • TA01

INPUT FREQUENCY (Hz)

EFFECTIVE BITS

S/(N + D) (dB)

10k 100k 1M 10M

LTC1409 • TA02

12 74

NYQUIST

FREQUENCY

SAMPLE

= 800ksps

Summary of content (20 pages)

PAGE 1
LTC1409 12-Bit, 800ksps Sampling A/D Converter with Shutdown U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Sample Rate: 800ksps Power Dissipation: 80mW 72.5dB S/(N + D) and 86dB THD at Nyquist No Pipeline Delay Nap (4mW) and Sleep (10µW) Shutdown Modes Operates with Internal 15ppm/°C Reference or External Reference True Differential Inputs Reject Common Mode Noise 20MHz Full Power Bandwidth Sampling ±2.
PAGE 2
LTC1409 W U U W W W AXI U U ABSOLUTE PACKAGE/ORDER I FOR ATIO RATI GS AVDD = OVDD = VDD (Notes 1, 2) TOP VIEW Supply Voltage (VDD) ................................................ 6V Negative Supply Voltage (VSS)................................ – 6V Total Supply Voltage (VDD to VSS) .......................... 12V Analog Input Voltage (Note 3) .................................. VSS – 0.3V to VDD + 0.3V Digital Input Voltage (Note 4) ............ VSS – 0.3V to 10V Digital Output Voltage .........
PAGE 3
LTC1409 W U DY A IC ACCURACY (Note 5) SYMBOL PARAMETER S/(N + D) Signal-to-Noise Plus Distortion Ratio 100kHz Input Signal (Note 12) 400kHz Input Signal (Note 12) THD Total Harmonic Distortion IMD CONDITIONS ● ● MIN TYP 70 68 73.0 72.5 MAX UNITS dB dB 100kHz Input Signal, First Five Harmonics 400kHz Input Signal, First Five Harmonics ● – 90 – 86 – 74 dB dB Peak Harmonic or Spurious Noise 400kHz Input Signal ● – 90 – 74 dB Intermodulation Distortion fIN1 = 29.37kHz, fIN2 = 32.
PAGE 4
LTC1409 W U POWER REQUIRE E TS (Note 5) SYMBOL PARAMETER CONDITIONS ISS Negative Supply Current Nap Mode Sleep Mode CS High ● CONVST = CS = RD = SHDN = 0V, NAP/SLP = 5V CONVST = CS = RD = SHDN = 0V, NAP/SLP = 0V MIN PDISS Power Dissipation Nap Mode Sleep Mode ● CONVST = CS = RD = SHDN = 0V, NAP/SLP = 5V CONVST = CS = RD = SHDN = 0V, NAP/SLP = 0V WU TI I G CHARACTERISTICS TYP MAX 10 10 1 15 UNITS mA µA µA 80 3.8 0.
PAGE 5
LTC1409 WU TI I G CHARACTERISTICS Note 11: The falling CONVST edge starts a conversion. If CONVST returns high at a critical point during the conversion it can create small errors. For best results ensure that CONVST returns high either within 650ns after conversion start or after BUSY rises. Note 12: Signal-to-noise ratio (SNR) is measured at 100kHz and distortion is measured at 400kHz. These results are used to calculate signal-to-noise plus distortion (SINAD).
PAGE 6
LTC1409 U W TYPICAL PERFORMANCE CHARACTERISTICS Differential Nonlinearity vs Output Code 1.00 1.00 0.50 0.50 DNL ERROR (LSB) INL ERROR (LSB) Integral Nonlinearity vs Output Code 0 –0.50 0 –0.50 –1.00 –1.
PAGE 7
LTC1409 U U U PI FU CTIO S CONVST (Pin 23): Conversion Start Signal. This active low signal starts a conversion on its falling edge. CS (Pin 24): Chip Select. The input must be low for the ADC to recognize CONVST and RD inputs. BUSY (Pin 25): The BUSY output shows the converter status. It is low when a conversion is in progress. Data valid on the rising edge of BUSY. VSS (Pin 26): – 5V Negative Supply. Bypass to AGND using 10µF tantalum in parallel 0.1µF or 10µF ceramic.
PAGE 8
LTC1409 U U W U APPLICATIONS INFORMATION The LTC1409 uses a successive approximation algorithm and an internal sample-and-hold circuit to convert an analog signal to a 12-bit parallel output. The ADC is complete with a precision reference and an internal clock. The control logic provides easy interface to microprocessors and DSPs. (Please refer to the Digital Interface section for the data format.) Conversion start is controlled by the CS and CONVST inputs.
PAGE 9
LTC1409 U W U U APPLICATIONS INFORMATION The signal-to-noise plus distortion ratio [S/(N + D)] is the ratio between the RMS amplitude of the fundamental input frequency to the RMS amplitude of all other frequency components at the A/D output. The output is band limited to frequencies from above DC and below half the sampling frequency. Figure 2 shows a typical spectral content with an 800kHz sampling rate and a 100kHz input.
PAGE 10
LTC1409 U U W U APPLICATIONS INFORMATION 0 fSAMPLE = 800kHz fIN1 = 88.19580078kHz fIN2 = 111.9995117kHz AMPLITUDE (dB) –20 –40 –60 fb – fa –80 2fa + fb fa + fb 2fa – fb 2fb – fa 2fa 3fa 2fb fa + 2fb 3fb –100 –120 0 50k 100k 150k 200k FREQUENCY (Hz) 300k 250k 400k 350k LTC1409 • F05 Figure 5.
PAGE 11
LTC1409 U W U UO APPLICATI S I FOR ATIO bandwidth must be greater than 20MHz to ensure adequate small-signal settling for full throughput rate. If slower op amps are used, more settling time can be provided by increasing the time between conversions. The best choice for an op amp to drive the LTC1409 will depend on the application.
PAGE 12
LTC1409 W U U UO APPLICATI S I FOR ATIO is required. Figure 7b shows a simple implementation using a LTC1560 5th order elliptic continuous time filter. 5V Input Range VIN 1 2 The ±2.5V input range of the LTC1409 is optimized for low noise and low distortion. Most op amps also perform best over this same range, allowing direct coupling to the analog inputs and eliminating the need for special translation circuitry. +AIN ANALOG INPUT –AIN LTC1409 LT1019A-2.
PAGE 13
LTC1409 W U U UO APPLICATI S I FOR ATIO The output is two’s complement binary with 1LSB = FS – (– FS)/4096 = 5V/4096 = 1.22mV. 70 60 50 111...111 40 111...110 111...101 30 OUTPUT CODE COMMON MODE REJECTION (dB) 80 20 10 0 1000 10 100 INPUT FREQUENCY (Hz) 1 10000 000...010 000...001 LTC1409 • TPC09 000...000 –(FS – 1LSB) Figure 10a. CMRR vs Input Frequency ANALOG INPUT 1 LTC1409 • F11a +AIN ±2.5V RANGE 2 0V TO 5V RANGE FS – 1LSB INPUT RANGE Figure 11a.
PAGE 14
LTC1409 W U U UO APPLICATI S I FOR ATIO BOARD LAYOUT AND BYPASSING The LTC1409 has differential inputs to minimize noise coupling. Common mode noise on the +AIN and –AIN leads will be rejected by the input CMRR. The –AIN input can be used as a ground sense for the +AIN input; the LTC1409 will hold and convert the difference voltage between +AIN and –AIN. The leads to +AIN (Pin 1) and –AIN (Pin 2) should be kept as short as possible.
PAGE 15
R2 10k J3 GND J6 1 R5 51Ω 1 2 JP2 U3A 74HC14 2 1 1 2 VCC 3 7 5 3 1 R6 1k D13 SS12 C11 10µF 10V JP4 8 6 4 2 VSS 4 10µF 10V + C14 22µF 10V + C12 C2 0.1µF SEE NOTE 3 C1 0.1µF R4 51Ω C9 0.001µF NPO 10% U3B 74HC14 C7 0.
PAGE 16
LTC1409 U W U UO APPLICATI S I FOR ATIO Figure 13b. Suggested Evaluation Circuit Board Component Side Silkscreen Figure 13c.
PAGE 17
LTC1409 U W U UO APPLICATI S I FOR ATIO Figure 13d. Suggested Evaluation Circuit Board Solder Side Layout Digital Interface The A/D converter is designed to interface with microprocessors as a memory mapped device. The CS and RD control inputs are common to all peripheral memory interfacing. A separate CONVST is used to initiate a conversion.
PAGE 18
LTC1409 W U U UO APPLICATI S I FOR ATIO can be latched with the BUSY rising edge. Mode 1a shows operation with a narrow logic low CONVST pulse. Mode 1b shows a narrow logic high CONVST pulse. NAP/SLP t3 SHDN In mode 2 (Figure 18) CS is tied low. The falling edge of CONVST signal again starts the conversion. Data outputs are in three-state until read by the MPU with the RD signal. Mode 2 can be used for operation with a shared MPU databus. LTC1409 • F14a Figure 14a.
PAGE 19
LTC1409 W U U UO APPLICATI S I FOR ATIO tCONV CS = RD = 0 t13 t5 CONVST t8 t6 t6 BUSY t7 DATA (N – 1) DB11 TO DB0 DATA DATA N DB11 TO DB0 DATA (N + 1) DB11 TO DB0 LTC1409 • F17 Figure 17. Mode 1b. CONVST Starts a Conversion. Data Outputs Always Enabled t13 tCONV t8 t5 CONVST t6 BUSY t9 t11 t12 RD t 10 DATA N DB11 TO DB0 DATA LTC1409 • F18 Figure 18. Mode 2. CONVST Starts a Conversion.
PAGE 20
LTC1409 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 0.397 – 0.407* (10.07 – 10.33) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0.205 – 0.212** (5.20 – 5.38) 0.068 – 0.078 (1.73 – 1.99) 0.301 – 0.311 (7.65 – 7.90) 0° – 8° 0.022 – 0.037 (0.55 – 0.95) 0.005 – 0.009 (0.13 – 0.22) 0.0256 (0.65) BSC 0.002 – 0.008 (0.05 – 0.21) 0.010 – 0.015 *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH (0.25 – 0.