Datasheet

20
LTC1404
1404fa
TYPICAL APPLICATIONS
U
LTC1404 Interface to the ADSP2181’s SPORT0 (Frame Sync is Generated from RFS0)
Data Stored in the ADSP2181’s Memory (Normal Mode, SLEN = D)
D2 D1
D0
D3
D4
D6
D7 D5
0
0
0
RDY D11
D10
D9 D8
1404 TA05d
D0 X
X
D1
D2
D4
D5 D3
RDY
X
D11
D10 D9
D8
D7 D6
1404 TA05c
Data from the LTC1404 (Normal Mode)
Logic Analyzer Waveforms Show 1.67µs Throughput Rate (Input Voltage = 1.604V, Output Code = 0110 0100 0100 = 1604
10
)
1404 TA05b
NOTE: WITHOUT THE EXTERNAL CLOCKING SIGNAL, THE ADSP2181 SCLK0 CAN BE PROGRAMMED TO RUN AT 8.3MHz
A
IN
V
SS
V
CC
V
REF
CLK
CONV
D
OUT
GND
SCLKO
RFSO
DR0
LTC1404
ADSP2181
9.6MHz
EXTERNAL CLOCK
UNIPOLAR
INPUT
+
10µF
0.1µF
+
10µF
5V
0.1µF
1
2
3
84
6
7
5
1404 TA05a