Datasheet

6
LTC1401
1401fa
PIN FUNCTIONS
UUU
V
CC
(Pin 1): Positive Supply, 3V. Bypass to GND (10µF
tantalum in parallel with 0.1µF ceramic).
A
IN
(Pin 2): Analog Input. 0V to 2.048V.
V
REF
(Pin 3): 1.2V Reference Output. Bypass to GND
(10µF tantalum in parallel with 0.1µF ceramic).
GND (Pin 4): Ground. GND should be tied directly to an
analog ground plane.
D
OUT
(Pin 5): The A/D conversion result is shifted out from
this pin.
LTC1401 • BD01
12-BIT CAPACITIVE DAC COMP
SUCCESSIVE APPROXIMATION
REGISTER/PARALLEL TO
SERIAL CONVERTER
ZEROING SWITCH
CONTROL
LOGIC
1.20V REF
D
OUT
V
CC
CONV
CLK
V
REF
A
IN
C
SAMPLE
12
GND
SHDN
FUNCTIONAL BLOCK DIAGRA
UU
W
LTC1401 • TC01
D
OUT
D
OUT
3k
3k
C
LOAD
C
LOAD
Hi-Z TO V
OH
V
OL
TO V
OH
V
OH
TO Hi-Z
Hi-Z TO V
OL
V
OH
TO V
OL
V
OL
TO Hi-Z
3V
TEST CIRCUITS
CLK (Pin 6): Clock. This clock synchronizes the serial data
transfer. A minimum CLK pulse of 60ns signals the ADC to
wake up from Nap or Sleep mode.
CONV (Pin 7): Conversion Start Signal. This active high
signal starts a conversion on its rising edge. Keeping CLK
low and pulsing CONV two/four times will put the ADC into
Nap/Sleep mode.
SHDN (Pin 8): Shutdown Input. Pull this pin Low to put the
ADC in Shutdown mode and save power (REFRDY will go
Low). The device will draw 4.5µA in this mode.