Datasheet

7
LTC1392
APPLICATIONS INFORMATION
WUU
U
MSB-First Data (MSBF = 1)
t
CYC
CS
START
SEL1 SEL0
SEL1 SEL0
MSBF
t
SMPL
Hi-Z Hi-Z
FILLED WITH ZEROS
D
IN
D
OUT
B9 B8 B7 B6 B5 B4 B3 B2 B1
t
CONV
B0
CLK
t
suCS
t
WAKEUP
t
CYC
CS
START MSBF
Hi-Z Hi-Z
LTC1392 • F01
FILLED WITH ZEROS
D
IN
D
OUT
B9 B8 B7 B6 B5 B4 B3 B2 B1
t
CONV
B0 B1 B2 B3 B4 B5 B6 B7 B8 B9
CLK
t
suCS
t
WAKEUP
t
SMPL
Figure 1
temperature measurement or a 10µs delay for other mea-
surements, followed by a 4-bit input word which config-
ures the LTC1392 for the current conversion. This data
word is shifted into the D
IN
input. D
IN
is then disabled from
shifting in any data and the D
OUT
pin is configured from
three-state to an output pin. A null bit and the result of the
current conversion are serially transmitted on the falling
CLK edge onto the D
OUT
line. The format of the A/D result
can be either MSB-first sequence or MSB-first sequence
followed by an LSB-first sequence. This provides easy
interface to MSB- or LSB-first serial ports. Bringing CS
high resets the LTC1392 for the next data exchange.
INPUT DATA WORD
Data transfer is initiated by a falling chip select (CS) signal.
After CS falls, the LTC1392 looks for a start bit. Once the
start bit is received, the next three bits are shifted into the
D
IN
input which configures the LTC1392 and starts the
conversion. Further inputs on the D
IN
input are then
ignored until the next CS cycle. The four bits of the input
word are defined as follows:
BIT 3 BIT 2 BIT 1 BIT 0
Start Select 1 Select 0 MSBF
Start Bit
The first “logic one” clocked into the D
IN
input after CS
goes low is the Start Bit. The Start Bit initiates the data
transfer and all leading zeros which precede this logical
one will be ignored. After the Start Bit is received the
remaining bits of the input word will be clocked in. Further
input on the D
IN
pin are then ignored until the next CS
cycle.