Datasheet
6
LTC1348
Figure 1. Driver Propagation Delay Timing
Figure 2. Receiver Propagation Delay Timing
SWITCHI G TI E WAVEFOR S
WWU
1.4V
0V
V
CC
0V
V
+
V
–
0V
DRIVER
INPUT
DRIVER
OUTPUT
1.4V
t
HLD
t
LHD
LTC1348 • F01
0.8V
V
CC
0V
2.4V
RX
INPUT
RX
OUTPUT
1.3V
t
HLR
1.7V
t
LHR
LTC1348 • F02
V
CC
0V
APPLICATIONS INFORMATION
WUU
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TEST CIRCUITS
Figure 3. Driver Timing Test Load
RX
RX INPUT
51pF
RX
OUTPUT
LTC1348 • F04
Figure 4. Receiver Timing Test Load
DRIVER
DRIVER
INPUT
3k
51pF
DRIVER
OUTPUT
LTC1348 • F03
Power Supply
The LTC1348 includes an onboard voltage-tripling charge
pump capable of generating ±8V from a single 3.3V
supply. This allows the LTC1348 drivers to provide guar-
anteed ±5V RS232-compliant voltage levels with a 3.3V
supply. With all outputs loaded with 3kΩ, the LTC1348
can typically swing ±5V with voltages as low as 2.85V. It
will meet the ±3.7V EIA562 levels with supply voltages as
low as 2.2V. The charge pump requires three external
flying capacitors to operate; 0.1µF ceramic capacitors are
adequate for most applications. For applications requiring
extremely high data rates or abnormally heavy output
loads, 0.33µF flying capacitors are recommended. Bypass
and output capacitor values should match those of the
flying capacitors and all capacitors should be mounted as
close to the package as possible.
LT1348 • TC
RS232 LINE PINS
PROTECTED TO ±10kV
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
LTC1348
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DR1 OUT
RX1 IN
DR2 OUT
RX2 IN
RX3 IN
RX4 IN
DR3 OUT
RX5 IN
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DR1 IN
RX1 OUT
DR2 IN
RX2 OUT
RX3 OUT
RX4 OUT
DR3 IN
RX5 OUT
DREN
RXEN
V
–
V
+
V
CC
GND
0.1µF
C2
+
C3
+
C3
–
C2
–
C1
+
C1
–
ESD Test Circuit