Datasheet

3
LTC1329-10/
LTC1329-50/LTC1329A-50
V
CC
= 3.3V, unless otherwise specified. (Notes 2, 3)
RECO E DED OPERATI G CO DITIO S
UUUUWW
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Serial Interface
f
CLK
Clock Frequency ● 2 MHz
t
CKS
Setup Time, CLK↓ Before CS↓ ● 150 ns
t
CSS
Setup Time, CS↓ Before CLK↑ ● 400 ns
t
DV
CS↓ to D
OUT
Valid See Test Circuits ● 150 ns
t
DS
D
IN
Setup Time Before CLK↑ ● 150 ns
t
DH
D
IN
Hold Time After CLK↑ ● 150 ns
t
DO
CLK↓ to D
OUT
Valid See Test Circuits ● 150 ns
t
CKHI
CLK High Time ● 200 ns
t
CKLO
CLK Low Time ● 250 ns
t
CSH
CLK↓ Before CS↑ ● 150 ns
t
DZ
CS↑ to D
OUT
in Hi-Z See Test Circuits ● 400 ns
t
CKH
CS↑ Before CLK↑ ● 400 ns
t
CSLO
CS Low Time f
CLK
= 2MHz (Note 4) ● 4550 ns
V
CLK
= 0V ● 400 ns
t
CSHI
CS High Time ● 400 ns
Note 2: Timing for all input signals is measured at 0.8V for a High-to-Low
transition and at 2V for a Low-to-High transition.
Note 3: Timing specification are guaranteed but not tested.
Note 4: This is the minimum time required for valid data transfer.
The
● denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
CODE
0
DNL (LSB)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
64
128
160
1392 G01
32 96
192
224
256
T
A
= 25°C
V
CC
= 3.3V
V(I
OUT
) = 0.45V
CODE
0
INL (LSB)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
64
128
160
1329 • TPC02
32 96
192
224
256
T
A
= 25°C
V
CC
= 3.3V
V(I
OUT
) = 0.45V
CODE
0
DNL (LSB)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
64
128
160
1392 G03
32 96
192
224
256
T
A
= 25°C
V
CC
= 3.3V
V(I
OUT
) = 0.45V
LTC1329-10 DNL vs Code LTC1329-10 INL vs Code
LTC1329-50 DNL vs Code