Datasheet

3
LTC1325
V
DD
= 12V ±5%, T
A
= 25°C, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
hDI
Hold Time, D
IN
After CLK↑ 150 ns
t
dsuCS
Setup Time, CS Before First CLK↑ 1 µs
t
dsuDI
Setup Time, D
IN
Stable Before First CLK↑ 400 ns
t
WHCLK
CLK High Time 0.8 µs
t
WLCLK
CLK Low Time 1 µs
t
WHCS
CS High Time Between Data Transfers 1 µs
t
WLCS
CS Low Time During Data Transfer MSBF = 1 43 CLK Cycles
MSBF = 0 52 CLK Cycles
RECO E DED CHARACTERISTICS
UWW
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to the GND pin.
Note 3: V
REG
within specified min and max limits, CLK (Pin 5) = 500kHz,
unless otherwise stated. ADC clock is the serial CLK.
Note 4: Linearity error is specified between the actual end points of the
A/D transfer curve.
Note 5: Channel leakage is measured after channel selection.
Note 6: Gas gauge offset excludes A/D offset error.
Note 7: I = V
DAC
(Duty Ratio)/R
SENSE
, where V
DAC
is the DAC output
voltage with control bits VR1 = VR0 = 1, duty ratio = 1 and R
SENSE
is
determined by the user.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OL
Output Low Voltage D
OUT
, I
OUT
= 1.6mA ● 0.4 V
V
OH
Output High Voltage D
OUT
, I
OUT
= –1.6mA ● 2.4 V
I
OZ
Hi-Z Output Leakage V
CS
= 5V ● ±10 µA
V
OHFET
DIS or PGATE Output High V
DD
= 4.5V to 16V ● V
DD
– 0.05 V
V
OLFET
DIS or PGATE Output Low V
DD
= 4.5V to 16V ● 0.05 V
t
dDO
Delay Time, CLK↓ to D
OUT
Valid See Test Circuits ● 650 ns
t
dis
Delay Time, CS↑ to D
OUT
Hi-Z See Test Circuits ● 510 ns
t
en
Delay Time, CLK↓ to D
OUT
Enabled See Test Circuits ● 400 ns
t
hDO
Time D
OUT
Remains Valid After CLK↓ See Test Circuits ● 30 ns
t
rDOUT
D
OUT
Rise Time See Test Circuits ● 250 ns
t
fDOUT
D
OUT
Fall Time See Test Circuits ● 100 ns
f
CLK
Serial I/O Clock Frequency CLK Pin ● 25 500 kHz
t
rPGATE
PGATE Rise Time C
LOAD
= 1500pF ● 150 ns
t
fPGATE
PGATE Fall Time C
LOAD
= 1500pF ● 150 ns
f
OSC
Internal Oscillator Frequency Charge Mode, Fail-Safes Disabled 90 111 130 kHz
A/D Converter
Offset Error V
IN
Channel (Note 3) ● ±2 LSB
Linearity Error V
IN
Channel (Notes 3, 4) ● ±0.5 LSB
Full-Scale Error V
IN
Channel (Note 3) ● ±1 LSB
On-Channel Leakage V
IN
Channel ON Only (Notes 3, 5) ● ±10 µA
Off-Channel Leakage V
IN
Channel OFF (Notes 3, 5) ● ±10 µA