Datasheet

16
LTC1293/LTC1294/LTC1296
129346fs
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
STAA $102A LOAD DIN INTO SPI, START SCK
WAIT2 LDAA $1029 CHECK SPI STATUS REG
BPL WAIT2 CHECK IF TRANSFER IS DONE
LDAA $102A LOAD LTC1294 MSBs INTO ACC A
STAA $62 STORE MSBs IN $62
LDAA $52 LOAD DUMMY DIN INTO ACC A FROM
$52
STAA $102A LOAD DUMMY DIN INTO SPI, START
SCK
WAIT3 LDAA $1029 CHECK SPI STATUS REG
BPL WAIT3 CHECK IF TRANSFER IS DONE
BSET $08,X,$01 D0 GOES HIGH (CS GOES HIGH)
LDAA $102A LOAD LTC1294 LSBs IN ACC
STAA $63 STORE LSBs IN $63
JMP LOOP START NEXT CONVERSION
LABEL MNEMONIC OPERAND COMMENTS
LDAA #$50 CONFIGURATION DATA FOR SPCR
STAA $1028 LOAD DATA INTO SPCR ($1028)
LDAA #$1B CONFIG. DATA FOR PORT D DDR
STAA $1009 LOAD DATA INTO PORT D DDR
LDAA #$10 LOAD DIN WORD INTO ACC A
STAA $50 LOAD DIN DATA INTO $50
LDAA #$E0 LOAD DIN WORD INTO ACC A
STAA $51 LOAD DIN DATA INTO $51
LDAA #$00 LOAD DUMMY DIN WORD INTO ACC A
STAA $52 LOAD DUMMY DIN DATA INTO $52
LDX #$1000 LOAD INDEX REGISTER X WITH $1000
LOOP BCLR $08,X,$01 D0 GOES LOW (CS GOES LOW)
LDAA $50 LOAD DIN INTO ACC A FROM $50
STAA $102A LOAD DIN INTO SPI, START SCK
LDAA $1029 CHECK SPI STATUS REG
WAIT1 BPL WAIT1 CHECK IF TRANSFER IS DONE
LDAA $51 LOAD DIN INTO ACC A FROM $51
MC68HC11 CODE
LABEL MNEMONIC OPERAND COMMENTS
Hardware and Software Interface to Intel 8051
CS
CLK
DATA
(D
IN
/D
OUT
)
LTC1293 TD02
1
23
46
57
8
PS BIT LATCHED
INTO LTC1294
8051 P1.2 OUTPUT DATA
TO LTC1294
8051 P1.2 RECONFIGURED
AS INPUT AFTER THE 8TH RISING
CLK BEFORE THE 8TH FALLING CLK
LTC1294 SEND A/D RESULT
BACK TO 8051 P1.2
LTC1294 TAKES CONTROL OF DATA
LINE ON 8TH FALLING CLK
START
B11
SGL/
DIFF
ODD/
SIGN
SEL
1
SEL
0
UNI
MSB
PS
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Hardware and Software Interface to Intel 8051
LTC1293 TD02a
D
OUT
FROM LTC1294 STORED IN 8051 RAM
00
0
0
B0
B2
B3 B1
B10
B11
LSB
MSB
R2
R3
B9
B8 B7
B6
B5 B4
CLK
D
OUT
CS
ANALOG
INPUTS
P1.4
P1.3
8051
D
IN
P1.2
MUX ADDRESS
A/D RESULT
LTC1294