Datasheet
10
LTC1291
1291fa
Table 1. Microprocessor with Hardware Serial Interfaces
Compatible with the LTC1291**
PART NUMBER TYPE OF INTERFACE
Motorola
MC6805S2, S3 SPI
MC68HC11 SPI
MC68HC05 SPI
RCA
CDP68HC05 SPI
Hitachi
HD6305 SCI Synchronous
HD6301 SCI Synchronous
HD63701 SCI Synchronous
HD6303 SCI Synchronous
HD64180 SCI Synchronous
National Semiconductor
COP400 Family MICROWIRE
†
COP800 Family MCROWIRE/PLUS
†
NS8050U MICROWIRE/PLUS
HPC16000 Family MICROWIRE/PLUS
Texas Instruments
TMS7002 Serial Port
TMS7042 Serial Port
TMS70C02 Serial Port
TMS70C42 Serial Port
TMS32011* Serial Port
TMS32020* Serial Port
TMS370C050 SPI
* Requires external hardware
** Contact LTC marketing for interface information for processors not on
this list
†
MICROWIRE and MICROWIRE/PLUS are trademarks of National
Semiconductor Corporation.
Unipolar Transfer Curve
0V
1LSB
V
REF
–2LSB
V
REF
–1LSB
V
REF
V
IN
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 0
•
•
•
1291 AI05b
Output Code
The LTC1291 performs a unipolar conversion. The follow-
ing shows the output code and transfer curve:
OUTPUT CODE
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 0
•
•
•
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
INPUT VOLTAGE
V
REF
– 1LSB
V
REF
– 2LSB
•
•
•
1LSB
0V
INPUT VOLTAGE
(V
REF
= 5V)
4.9988V
4.9976V
•
•
•
0.0012V
0V
1291 AI05a
Unipolar Output Code
Microprocessor Interfaces
The LTC1291 can interface directly (without external hard-
ware) to most popular microprocessors’s (MPU) synchro-
nous serial formats (see Table 1). If an MPU without a
dedicated serial port is used, then three of the MPU’s
parallel port lines can be programmed to form the serial
link to the LTC1291. Included here are one serial interface
example and one example showing a parallel port pro-
grammed to form the serial interface.
Motorola SPI (MC68HC11)
The MC68HC11 has been chosen as an example of an MPU
with a dedicated serial port. This MPU transfers data MSB
-first and in 8-bit increments. The D
IN
word sent to the data
register starts the SPI process. With three 8-bit transfers,
the A/D result is read into the MPU. The second 8-bit
transfer clocks B11 through B8 of the A/D conversion
result into the processor. The third 8-bit transfer clocks the
remaining bits, B7 through B0, into the MPU. The data is
right justified in the two memory locations. ANDing the
second byte with 0D
HEX
clears the four most significant
bits. This operation was not included in the code. It can be
inserted in the data gathering loop or outside the loop
when the data is processed.
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